Accurate Measurement of Sneak Current in ReRAM Crossbar Array with Data Storage Pattern Dependencies

Shang, Yaqi; Ohsawa, Takashi

doi:10.1109/vlsi-tsa.2019.8804668

Cited by 8 publications

(3 citation statements)

References 3 publications

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“…The crossbar memory arrays of ReRAM face the challenge of sneak path currents [8]. This phenomenon occurs when currents unintentionally flow through adjacent unselected cells during a memory operation, resulting from a crossbar array's inherent architecture where multiple current paths exist simultaneously [9].…”

Section: Challengesmentioning

confidence: 99%

Insulator Metal Transition-Based Selector in Crossbar Memory Arrays

Darwish,

Pohl

2024

Electronic Materials

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This article investigates resistive random access memory (ReRAM) crossbar memory arrays, which is a notable development in non-volatile memory technology. We highlight ReRAM’s competitive edge over NAND, NOR Flash, and phase-change memory (PCM), particularly in terms of endurance, speed, and energy efficiency. This paper focuses on the architecture of crossbar arrays, where memristive devices are positioned at intersecting metal wires. We emphasize the unique resistive switching mechanisms of memristors and the challenges of sneak path currents and delve into the roles and configurations of selectors, particularly focusing on the one-selector one-resistor (1S1R) architecture with an insulator–metal transition (IMT) based selector. We use SPICE simulations based on defined models to examine a 3 × 3 1S1R ReRAM array with vanadium dioxide selectors and titanium dioxide film memristors, assessing the impact of ambient temperature and critical IMT temperatures on array performance. We highlight the operational regions of low resistive state (LRS) and high resistive state (HRS), providing insights into the electrical behavior of these components under various conditions. Lastly, we demonstrate the impact of selector presence on sneak path currents. This research contributes to the overall understanding of ReRAM crossbar arrays integrated with IMT material-based selectors.

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Section: Challengesmentioning

confidence: 99%

Insulator Metal Transition-Based Selector in Crossbar Memory Arrays

Darwish,

Pohl

2024

Electronic Materials

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“…By using a selector device, such as a transistor, the affection of the sneak current can be mitigated [17]. Therefore, the NMOS transistors of the PUF are enabled all the time, while in the memory process, the read scheme based on sneak current compensation can be adopted using the NMOS transistors [18].…”

Section: Proposed Dynamically Configurable Puf Based On a Rram Crossb...mentioning

confidence: 99%

Dynamically Configurable Physical Unclonable Function based on RRAM Crossbar

Jiang

Cui

et al. 2021

2021 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)

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Physical unclonable function (PUF) has been an effective solution for hardware security with the popularity of the internet of things (IoT). Due to low power consumption and high area efficiency, an emerging nonvolatile memory, resistive random access memory (RRAM) based PUF designs have attracted many attentions. Due to the bottleneck in the existing RRAM PUFs that it can not be fully compatible with the memory architecture, a dynamically configurable PUF based on the mainstream RRAM crossbar is proposed in this paper. Utilizing the device-to-device variation of the RRAM resistance, abundant challenge-response pairs (CRPs) are generated with a flexible configuration of an RRAM crossbar. Furthermore, different from the existing RRAM-based PUF designs, the proposed RRAM PUF can be dynamically configured between a memory cell and a PUF cell, without requiring additional sense circuits, leading to a minimal design overhead. The simulation results show that the proposed PUF exhibits good performance with a high uniqueness and reliability. Moreover, it achieves a great resistance against machine learning (ML) attack.

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“…When the selected cell is read in the three-dimensional cross-point structure, the read current on the selected BL will be disturbed by the leakage current on the unselected cell, making it difficult to distinguish the reading signal accurately. Figure 2 a shows the sneak current issue of the cross-point RRAM [ 12 , 49 , 50 , 51 , 52 ].…”

Section: The Design Challenges Of Rrammentioning

confidence: 99%

Sensing Circuit Design Techniques for RRAM in Advanced CMOS Technology Nodes

et al. 2021

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Resistive random access memory (RRAM) is one of the most promising new nonvolatile memories because of its excellent properties. Moreover, due to fast read speed and low work voltage, it is suitable for seldom-write frequent-read applications. However, as technology nodes shrink, RRAM faces many issues, which can significantly degrade RRAM performance. Therefore, it is necessary to optimize the sensing schemes to improve the application range of RRAM. In this paper, the issues faced by RRAM in advanced technology nodes are summarized. Then, the advantages and weaknesses in the novel design and optimization methodologies of sensing schemes are introduced in detail from three aspects, the reference schemes, sensing amplifier schemes, and bit line (BL)-enhancing schemes, according to the development of technology in especially recent years, which can be the reference for designing the sensing schemes. Moreover, the waveforms and results of each method are illustrated to make the design easy to understand. With the development of technology, the sensing schemes of RRAM become higher speed and resolution, low power consumption, and are applied at advanced technology nodes and low working voltage. Now, the most advanced nodes the RRAM applied is 14 nm node, the lowest working voltage can reach 0.32 V, and the shortest access time can be only a few nanoseconds.

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Accurate Measurement of Sneak Current in ReRAM Crossbar Array with Data Storage Pattern Dependencies

Cited by 8 publications

References 3 publications

Insulator Metal Transition-Based Selector in Crossbar Memory Arrays

Insulator Metal Transition-Based Selector in Crossbar Memory Arrays

Dynamically Configurable Physical Unclonable Function based on RRAM Crossbar

Sensing Circuit Design Techniques for RRAM in Advanced CMOS Technology Nodes

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