Activation Technique for Sleep-Transistor Circuits for Reduced Power Supply Noise

Optimal MTCMOS reactivation under power supply noise and performance constraints

“…One problem with this solution stands in the fact that, as the threshold-voltage is subject to strong process and thermal variations, an optimum step voltage is hard to find. In order to overcome this limitation, Quasi-Continuous overdrive increment was proposed in [7]. A switched capacitor circuit was used to increase the gate-to-source voltage of the switch device in arbitrarily small steps.…”

Scan based methodology for reliable state retention power gating designs

“…Using this methodology, various error detection and correction codes can be applied to monitor the state of power gated design and correct any corrupted states if necessary. Rush current reduction methods [7,8] are effective but if the state of a power gated design is corrupted they can not correct them. Through the case presented here, it is believed that an approach grounded in state monitoring and corrections, is the right step towards reliable state retention power gating designs.…”

“…In this work the state integrity of power gated design is protected using state monitoring and recovery achieved by scan chain encoding and decoding. In [7,8] the impact of supply voltage fluctuation on the state integrity is reduced through rush In this paper a methodology is introduced which protects the state integrity of power gated design in deep sleep mode through scan chain encoding and decoding. Using this methodology, various error detection and correction codes can be applied to monitor the state of power gated design and correct any corrupted states if necessary.…”

“…In [7] the author proposed to turn on power transistors slowly by either controlling the gate-tosource voltage of the power transistors or turn-on a portion of the power transistors at one time. In [8] it was proposed to use pump capacitors to slowly turn on the power transistors and use a voltage monitor circuit to detect the end of the activation process. Although the general theme of the work in [7,8] and this paper appear similar -to protect the state integrity of power gated circuits, there is fundamental difference.…”

“…In [8] it was proposed to use pump capacitors to slowly turn on the power transistors and use a voltage monitor circuit to detect the end of the activation process. Although the general theme of the work in [7,8] and this paper appear similar -to protect the state integrity of power gated circuits, there is fundamental difference. In this work the state integrity of power gated design is protected using state monitoring and recovery achieved by scan chain encoding and decoding.…”