Active layer thickness effects on the structural and electrical properties of p-type Cu2O thin-film transistors

Nam, Dong Woo; Cho, In-Tak; Lee, Jong-Ho; Cho, Eou‐Sik; Sohn, Joonsung; Song, Sang-Hun; Kwon, Hyuck‐In

doi:10.1116/1.4764110

Cited by 32 publications

(29 citation statements)

References 23 publications

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“…Research on Cu 2 O has a long history, and the fabrication of Cu 2 O thin films or nanostructures has been widely reported by various techniques, such as PLD, magnetron sputtering, and thermal oxidation; and chemical routes, such as electrodeposition, spin coating, atomic‐layer deposition, spray coating, molecular‐beam epitaxy, microwave irradiation from a Cu precursor, chemical vapor deposition, and ink printing . A summary of the most promising studies on binary copper oxide thin films is shown in Table 2 .…”

Section: Discovery and Synthesis Of Hole‐transporting (P‐type) Oxidesmentioning

confidence: 99%

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Recent Developments in p‐Type Oxide Semiconductor Materials and Devices

et al. 2016

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The development of transparent p-type oxide semiconductors with good performance could be a true enabler for a variety of applications, where transparency, power efficiency and more circuit complexity are needed. Such applications include transparent electronics, displays, sensors, photovoltaics, memristors, and electrochromics. Hence, we review recent developments in materials and devices based on p-type oxide semiconductors, including ternary Cu-bearing oxides, binary copper oxides, tin monoxide, spinel oxides and nickel oxides. The crystal and electronic structures of these materials are reviewed, along with approaches to enhance valence band dispersion to reduce effective mass and increase mobility.Strategies to reduce the interfacial defects, off state current, and material instability are discussed. Furthermore, we show that promising progress has been made in the performance of various type of devices based on p-type oxides. For example, transparent oxide-based p-n junction diodes have experienced significantly improved performance, where rectification ratios >10 7 have been achieved. The performances of thin-film transistors and inverters have also been modestly improved. For example, thin-film transistors with field-effect mobilities exceeding 5 cm 2 V -1 s -1 have been reported. In addition, several innovative approaches were developed to fabricate transparent complementary metal oxide semiconductor (CMOS) 2 devices. These approaches include novel device fabrication schemes and utilization of surface chemistry effects, resulting in good inverter gains (as high as 120 has been demonstrated).Some progress has also been made in reducing the interfacial defects and off state currents using capping layers, high quality dielectrics and surface treatments. Resistive memory devices and hole transport layer in optoelectronic devices, mostly based on nickel oxide, have made decent progress. Transparent ferroelectric memory devices comprising p-type oxides have also been reported recently showing good hole mobilities (~3.3 cm 2 V -1 s -1 ) and good retention characteristics. This even includes multistate memory devices that show good stability. Nanoscale (e.g. nanowire) devices have now been reported using p-type oxides and do show performance improvements at scaled device geometry. New process developments have been reported, and some p-type oxides can now be deposited using atomic layer deposition and chemical routes, with promising performances. However, despite these recent developments, p-type oxides still lag in performance behind the n-type counterparts, which have entered volume production in the display market. The recent successes along with the hurdles that stand in the way of commercial success of p-type oxide semiconductors are presented in this review.

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Section: Discovery and Synthesis Of Hole‐transporting (P‐type) Oxidesmentioning

confidence: 99%

“…Nam et al studied the effect of active‐layer thickness on p‐type Cu 2 O TFTs . Staggered bottom‐gate TFTs were built on a Si substrate with 100 nm of thermally grown SiO 2 as the dielectric layer, while Ni was evaporated as the top contact.…”

Section: Performance Of P‐type Oxide Thin‐film Transistorsmentioning

confidence: 99%

Recent Developments in p‐Type Oxide Semiconductor Materials and Devices

et al. 2016

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“…75,298,299 Moreover, doping of n-type metal oxide semiconductors has enabled the demonstration of p-type TFTs based on P-and N-doped ZnO NW, 259,300 as well Ga 2 O 3 :Zn. 70 Among all the reported p-type metal oxide semiconductor TFTs, [70][71][72][73][74][75]79,[280][281][282][283][284][285][286][287][288][289][290][291][292][293][294]300 only few devices have been fabricated on flexible substrates. 36,79,257,267,272,273,285,289 This is mainly due to the high deposition and annealing temperatures (typically !200 C) that are required, which are incompatible with flexible temperature-sensitive substrates.…”

Section: A P-type Metal Oxide Semiconductorsmentioning

confidence: 99%

Metal oxide semiconductor thin-film transistors for flexible electronics

Petti

Münzenrieder

Vogt

et al. 2016

Applied Physics Reviews

561

430

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“…In this case, the driving force for the nucleation growth was increased at a given annealing temperature. For the polycrystalline MOS films, the enhanced crystallinity would certainly decrease the number of trapping centers and carrier scattering events, which is beneficial to the carrier transport along the conducting channel inside the films …”

Section: Key Parameters Of Cu:nio Tfts Fabricated Under Various Condimentioning

confidence: 99%

“…The representative transfer characteristics of Cu:NiO TFTs as a function of the Cu ratio are shown in Figure a. The small counterclockwise hysteresis (<0.1 V) indicates that there are small amounts of traps within the Cu:NiO channel layers and at the interface of Cu:NiO/ZrO 2 . The extracted device parameters, i.e., hole mobility (μ h , FE ), on–off current ratio ( I on / I off ), threshold voltage ( V TH ), and subthreshold swing (SS), are summarized in Table 1 .…”

Section: Key Parameters Of Cu:nio Tfts Fabricated Under Various Condimentioning

confidence: 99%

Solution Combustion Synthesis: Low‐Temperature Processing for p‐Type Cu:NiO Thin Films for Transparent Electronics

et al. 2017

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Low-temperature solution processing opens a new window for the fabrication of oxide semiconductors due to its simple, low cost, and large-area uniformity. Herein, by using solution combustion synthesis (SCS), p-type Cu-doped NiO (Cu:NiO) thin films are fabricated at a temperature lower than 150 °C. The light doping of Cu substitutes the Ni site and disperses the valence band of the NiO matrix, leading to an enhanced p-type conductivity. Their integration into thin-film transistors (TFTs) demonstrates typical p-type semiconducting behavior. The optimized Cu NiO TFT exhibits outstanding electrical performance with a hole mobility of 1.5 cm V s , a large on/off current ratio of ≈10 , and clear switching characteristics under dynamic measurements. The employment of a high-k ZrO gate dielectric enables a low operating voltage (≤2 V) of the TFTs, which is critical for portable and battery-driven devices. The construction of a light-emitting-diode driving circuit demonstrates the high current control capability of the resultant TFTs. The achievement of the low-temperature-processed Cu:NiO thin films via SCS not only provides a feasible approach for low-cost flexible p-type oxide electronics but also represents a significant step toward the development of complementary metal-oxide semiconductor circuits.

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Active layer thickness effects on the structural and electrical properties of p-type Cu2O thin-film transistors

Cited by 32 publications

References 23 publications

Recent Developments in p‐Type Oxide Semiconductor Materials and Devices

Recent Developments in p‐Type Oxide Semiconductor Materials and Devices

Metal oxide semiconductor thin-film transistors for flexible electronics

Solution Combustion Synthesis: Low‐Temperature Processing for p‐Type Cu:NiO Thin Films for Transparent Electronics

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