Adaptive sampling methodology for in-line defect inspection

Abstract

Today's advanced semiconductor manufacturers have well over one hundred process steps and several weeks of throughput times. In order to minimize the product at risk at final test, in line defect monitoring inspection with an adequate sampling plan are used to measure and collect defectivity levels on product wafers at key inspection steps during both process development and high-volume manufacturing phases. The sampling plan for inspection is constrained by the inspection tools available capacity whilst being driven by cost of excursions or material at risk.In this paper, key metrics such as the Variance Ratio, defined as the ratio between lot-to-lot variance and wafer-towafer variance, the Excursion Frequency, and the Normalized Mean Shift are analyzed as the sampling (%lots, #wfrs/lot) is modified. The results are then used to propose a method of monitoring and controlling these key metrics to trigger a mechanism for more or less sampling (adaptive or dynamic sampling) to better utilize the inspection resources and quicker excursion detection while minimizing the yield loss to production. INTRODUCTIONThe problem of optimally applying inspection equipment in defect inspection is very complex and only partially addressed [1]. Many IC manufacturers currently use a static sampling plan strategy to monitor and detect process and baseline defectivity excursions. In this case, the yield engineer determines the number of lots, wafers/lot, % area of wafer and the placement of where the measurements and inspections take place i.e. photo, etch, metal 1 etc. The frequency and the sensitivity of the measurement and/or inspections are also selected in advance and are rarely changed. With this method it is easier to determine the resource needed (measurement and inspection capacity) at various stage of the product life cycle.

Effective Process Equipment Defect Control Methodology

“…This level is considered a manageable level of false alarms and is expected to have a minimum impact on the excursion frequency [2]. Figure 7 shows that, using normal distribution statistics, even with a mean + 2.7 sigma (second bar chart from the left), there is a risk of not detected any excursion (0%).…”

Preliminary study of an intelligent sampling decision scheme for the AVM system

“…These sampling methods are to achieve the goal of using real inspections provided to monitor the whole production process and the sampled wafers are the representative for the other related ones. One example of adaptive sampling was proposed by Boussetta and Cross [8]. However, a drawback of adaptive sampling is that it only modifies the sampling rate based on the initial sampling plan.…”

A Literature Review on Sampling Techniques in Semiconductor Manufacturing

“…A Sample Planner is developed by KLATencor to assist in the development of cost-effective defect inspection sampling strategies, and to provide an accurate assessment of whether monitor reduction and/or elimination should be pursued for cost savings. The results of the project indicate that the costs due to defect excursions could com- [33] 1995 * * Kuo et al [34] 1996 * * * Kuo et al [12] 1997 * * Babikian and Engelhard [35] 1998 * Williams et al [36] 1999 * * Williams et al [37] 1999 * * Langford et al [38] 2000 * * Nurani and Shantikumar [39] 2000 * * * Lee et al [40] 2001 * * Wootton et al [41] 2001 * * Allebé et al [42] 2002 * * Lee [43] 2002 * * Song-Bor et al [44] 2003 * * Sullivan et al [45] 2004 * * Moon et al [46] 2005 * * Boussetta and Cross [14] 2005 * * Mouli [13] 2005 * Shantikumar [47] 2007 * Mouli et al [48] 2007 * * Bunday et al [49] 2008 * Veetil et al [50] 2009 * * Chen et al [51] 2009 * * Sahnoun et al [52] 2010 * * Sahnoun et al [53] 2010 * * * Good et al [54] 2010 * * Nduhura Munga et al [55] 2011 * * pletely eradicate any projected savings from monitor reduction activities, due to the additional defect excursions that would be missed by the reduced inspection sampling plan. Wootton et al [41] present a study performed between KLA-Tencor and Motorola.…”

“…By always measuring the same lots or wafers, the technique enables the identification of the added defect density between sequential inspection steps [16]. Other advantages of a static sampling technique are the simplicity of implementation and adequate resourcing [14]. The technique has been widely used in the 1990's in most semiconductor plants.…”

“…The number of lots to measure depends on the available inspection capacity, the maturity of the technology, and the process step criticality [14]. The frequency and the sensitivity of the measurement are selected in advance, at the start of [18] 1994 * * Nurani et al [19] 1996 * McIntyre et al [20] 1996 * * Tomlinson et al [21] 1997 * * Scanlan et al [22] 1998 * Elliott et al [23] 1999 * Chien et al [24] 2000 * Lee et al [11] 2001 * Chien et al [25] 2001 * * Shumaker et al [26] 2003 * * Xumei et al [27] 2003 * * Wu and Pearn [28] 2006 * * Kwang and Chin [29] 2008 * * production.…”