Addressing the gate stack challenge for high mobility In<inf>x</inf>Ga<inf>1-x</inf>As channels for NFETs

Scalability of Sub-100 nm InAs HEMTs on InP Substrate for Future Logic Applications

“…Future III-V FETs are likely to integrate a high-k dielectric in the gate stack and a self-aligned architecture [6]- [9]. There are several challenges to overcome before this can be accomplished [10]- [12].…”

An investigation of capacitance-voltage hysteresis in metal/high-k/In0.53Ga0.47As metal-oxide-semiconductor capacitors

“…The issue of C-V hysteresis in the In 0.53 Ga 0.47 As MOS system has received only a limited amount of research attention to date. 23,24 The issue of C-V hysteresis is important from a technological perspective as it represents a physical process that results in device instability, and in addition, the level of charge trapping can be comparable to, or greater than, the effect of interface states for the In 0.53 Ga 0.47 As MOS system. 23 From a scientific perspective, the study of C-V hysteresis is of interest as it presents a method to analyse and quantify the density of charge trapping states in high-k oxides on III-V surfaces.…”

(Invited) Buried-Channel In0.7Ga0.3As MOSFETs and Vertical In0.7Ga0.3As Tunneling FETs for beyond CMOS Applications

“…However, the effective channel mobility μ eff of these devices is still relatively low compared to the bulk mobility of InGaAs [e.g., μ eff ~ 1000 -1700 cm 2 /Vs (Ref. [1][2][3]]. On the other hand, buried channel InGaAs MOSFETs with InAlAs barrier layer and Si interfacial passivation layer [4][5] , or with single InP barrier layer 6 using ex-situ ALD oxide, or flat band InGaAs MOSFETs with GaAs/AlGaAs barrier layer and Si δ-doping using in-situ MBE GaGdO gate oxide [7][8] , or MOS high-electron-mobility transistors (MOS-HEMTs) 9 demonstrate much higher channel mobility (e.g., μ eff > 3800 cm 2 /Vs (Ref.…”

“…III-V metal-oxide-semiconductor field-effect-transistors (MOSFETs) and tunneling FETs (TFETs) are possible candidates to replace Si MOSFETs at low operating voltages. Due to lack of good quality high-κ/III-V interface, recently several efforts focused on solving gate stack issues for surface channel MOSFETs [1][2][3] . However, the effective channel mobility μ eff of these devices is still relatively low compared to the bulk mobility of InGaAs [e.g., μ eff ~ 1000 -1700 cm 2 /Vs (Ref.…”

“…Due to lack of good quality high-κ/III-V interface, recently several efforts focused on solving gate stack issues for surface channel MOSFETs [1][2][3] . However, the effective channel mobility μ eff of these devices is still relatively low compared to the bulk mobility of InGaAs [e.g., μ eff ~ 1000 -1700 cm 2 /Vs (Ref. [1][2][3]].…”