ADEPOS: A Novel Approximate Computing Framework for Anomaly Detection Systems and its Implementation in 65-nm CMOS

Bose, Sumon Kumar; Kar, Bapi; Roy, Mohendra; Gopalakrishnan, P. K.; Patil, Aakash; Basu, Arindam

doi:10.1109/tcsi.2019.2958086

Cited by 21 publications

(9 citation statements)

References 48 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…With the aim to reduce the HW computing resources, [24]- [27] exploit lightweight variants of CNN, based on Tiny-YOLO [24], MobileNet [25] and ShuffleNet [26], but they are still inadequate for HW implementation with a power budget in the order of microwatts. With the purpose to reduce the power dissipation, in [28] a configurable neural custom architecture has been presented, which normally operates with a small, lowprecision AE, but it increases the complexity of the network and the computing precision on the detection of anomalies. While this approach could be effective for fault detection, it is not the best choice for PdM, which requires high accuracy when weak, initial signals of early anomalies occur [2], [3].…”

Section: Related Workmentioning

confidence: 99%

“…Comparisons with the state of the art are not that simple due to the limited number of works targeting low power integrated implementations and the lack of data reported by other papers. However, from the recent literature, we have considered the data of the ADEPOS design in [28] and [40], since it is one of the rare works that target lowpower AE-based system with a 65 nm CMOS technology, although it is not a quite fair comparison. Indeed, to reduce the power dissipation from a maximum value of 744 µW to a standby power dissipation of 12 µW, ADEPOS completely activates only after that an anomalous data has been detected, dynamically increasing its complexity and accuracy only during about 1% of the lifetime [34], based on tests with the dataset in [41] and an ODR of 20 kHz.…”

Section: B Standard Cellsmentioning

confidence: 99%

See 1 more Smart Citation

Low-Power Detection and Classification for In-Sensor Predictive Maintenance Based on Vibration Monitoring

et al. 2022

View full text Add to dashboard Cite

In this work, a new custom design of an anomaly detection and classification system is proposed. It is composed of a convolutional Auto-Encoder (AE) hardware design to perform anomaly detection which cooperates with a mixed HW/SW Convolutional Neural Network (CNN) to perform the classification of detected anomalies. The AE features a partial binarization, so that the weights are binarized while the activations, associated to some selected layers, are non-binarized. This has been necessary to meet the severe area and energy constraints that allow it to be integrated on the same die as the MEMS sensors for which it serves as a neural accelerator. The CNN shares the feature extraction module with the AE, whereas a SW classifier is triggered by the AE when a fault is detected, working asynchronously to it. The AE has been mapped on a Xilinx Artix-7 FPGA, featuring an Output Data Rate (ODR) of 365 kHz and achieving a power dissipation of 333 W/MHz. Logic synthesis has targeted TSMC CMOS 65 nm, 90 nm, and 130 nm standard cells. Best results achieved highlight a power consumption of 138 μW/MHz with an area occupation of 0.49 mm 2 when real-time operations are set. These results enable the integration of the complete neural accelerator in the CMOS circuitry that typically sits with the inertial MEMS on the same silicon die. Comparisons with the related works suggest that the proposed system is capable of state-of-the-art performances and accuracy.

show abstract

Section: Related Workmentioning

confidence: 99%

Section: B Standard Cellsmentioning

confidence: 99%

Low-Power Detection and Classification for In-Sensor Predictive Maintenance Based on Vibration Monitoring

et al. 2022

View full text Add to dashboard Cite

show abstract

“…As an important part of the information system and network security, [1][2][3][4] security situation assessment is necessary for security managers to obtain the overall security situation of the system, [5][6][7][8][9] identify system abnormal events, [10][11][12][13] and make rational decisions.…”

Section: Introductionmentioning

confidence: 99%

A Pythagorean fuzzy Petri net based security assessment model for civil aviation airport security inspection information system

Yang

Feng

2021

Int J Intell Syst

View full text Add to dashboard Cite

This paper investigates the problem of the existing information system security situation assessment models that are less concerned about fuzzy factors and lack of reasoning. First, Pythagorean fuzzy sets are adopted to deal with the ambiguity and uncertainty of the civil aviation airport security inspection information system security situation indicators, and a Pythagorean fuzzy Petri nets (PFPNs) model is established according to the indicator system. Then, based on the characteristics of PFPN, the propositions credibility reasoning algorithm and the security situation fuzzy reasoning algorithm are designed. Finally, the feasibility of the model is verified through the assessment experiment on the security inspection information system of a civil aviation airport. The experimental results show that the PFPN model has better stability and lower algorithm time complexity compared with other models.

show abstract

“…In this paper, we propose a non-overlap median filter (NOMF) for image denoising. Even though the NOMF introduces approximation in computation [22], it: 1) reduces the number of computes, explained later in section III-F, and 2) enables hardware implementation of image denoising, leveraging inherent read disturb phenomenon of 6T-SRAM. Our significant contributions in this paper are as follows:…”

Section: Introductionmentioning

confidence: 99%

A 51.3 TOPS/W, 134.4 GOPS In-memory Binary Image Filtering in 65nm CMOS

Bose,

Singla,

Basu

2021

Preprint

Self Cite

View full text Add to dashboard Cite

Neuromorphic vision sensors (NVS) can enable energy savings due to their event-driven that exploits the temporal redundancy in video streams from a stationary camera. However, noise-driven events lead to the false triggering of the object recognition processor. Image denoise operations require memoryintensive processing leading to a bottleneck in energy and latency. In this paper, we present in-memory filtering (IMF), a 6T-SRAM in-memory computing based image denoising for event-based binary image (EBBI) frame from an NVS. We propose a non-overlap median filter (NOMF) for image denoising. An in-memory computing framework enables hardware implementation of NOMF leveraging the inherent read disturb phenomenon of 6T-SRAM. To demonstrate the energy-saving and effectiveness of the algorithm, we fabricated the proposed architecture in a 65nm CMOS process. As compared to fully digital implementation, IMF enables > 70× energy savings and a > 3× improvement of processing time when tested with the video recordings from a DAVIS sensor and achieves a peak throughput of 134.4 GOPS. Furthermore, the peak energy efficiencies of the NOMF is 51.3 TOPS/W, comparable with state of the art inmemory processors. We also show that the accuracy of the images obtained by NOMF provide comparable accuracy in tracking and classification applications when compared with images obtained by conventional median filtering.

show abstract

ADEPOS: A Novel Approximate Computing Framework for Anomaly Detection Systems and its Implementation in 65-nm CMOS

Cited by 21 publications

References 48 publications

Low-Power Detection and Classification for In-Sensor Predictive Maintenance Based on Vibration Monitoring

Low-Power Detection and Classification for In-Sensor Predictive Maintenance Based on Vibration Monitoring

A Pythagorean fuzzy Petri net based security assessment model for civil aviation airport security inspection information system

A 51.3 TOPS/W, 134.4 GOPS In-memory Binary Image Filtering in 65nm CMOS

Contact Info

Product

Resources

About