Advanced i-PVD barrier metal deposition technology for 90 nm Cu interconnects

Park, K.-C.; Kim, I.-R.; Suh, Bum-Seok; Choi, Sang-Jin; Song, W.S.; Wee, Y.J.; Lee, S.-G.; Chung, J.-S.; Chung, J.-H.; Hah, Sang Rok; Ahn, Joo-Seob; Lee, K.-T.; Kang, Ho-Kyu; Suh, Kwang-Pyuk

doi:10.1109/iitc.2003.1219743

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Dielectric or Metal Liner Barrier Deposition1

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“…Nonetheless, the barrier integrity can be enhanced by improving the barrier deposition process or by modifying the integration scheme. For non-porous low-k dielectrics such as SiOC, Ar ion re-sputtering after TaN and Ta deposition is suggested to reduce the barrier thickness at the via bottom while improving the coverage at the sidewall [24,25].…”

Section: Dielectric or Metal Liner Barrier Depositionmentioning

confidence: 99%

Dielectric failure mechanisms in advanced Cu/low-k interconnect architecture

Tan¹

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Section: Dielectric or Metal Liner Barrier Depositionmentioning

confidence: 99%

Dielectric failure mechanisms in advanced Cu/low-k interconnect architecture

Tan¹

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Barrier layer thickness analysis for reliable copper plug process in CMOS technology

Manhas

Singh

2011

Microelectronics Reliability

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Cu filling of 10 nm trenches by high-magnetic-field magnetron sputtering

Itoh

Uhara

Saito

2014

Jpn. J. Appl. Phys.

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Ru and Cu sputterings were performed with two different high-vacuum sputtering systems. The Ru sputtering was performed by high-vacuum sputtering. On the other hand, the Cu sputtering was performed by high-magnetic-field sputtering. High-magnetic-field sputtering, which entails a Cu deposition rate of 80 nm/min (target-substrate distance: 200 mm) at a sputtering pressure of 7 ' 10 %2 Pa, is used for the Cu filling of 10-nmwide Ru-lined trenches with an aspect ratio of 6.5. The complete Cu filling of trenches is accomplished within 1 min of sputtering time using a 1 at. % N 2 -Ar sputtering gas. The reason for the complete Cu filling is considered in terms of the capillary theory, focusing on the wettability of Cu on Ru. The improvement in Cu wettability with the use of a N 2 additive is also evaluated in terms of the contact angle for Cu on Ru and surface shape.

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Advanced i-PVD barrier metal deposition technology for 90 nm Cu interconnects

Cited by 3 publications

References 1 publication

Dielectric failure mechanisms in advanced Cu/low-k interconnect architecture

Dielectric failure mechanisms in advanced Cu/low-k interconnect architecture

Barrier layer thickness analysis for reliable copper plug process in CMOS technology

Cu filling of 10 nm trenches by high-magnetic-field magnetron sputtering

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