An adaptive genetic algorithm for VLSI floorplanning based on sequence-pair

Nakaya, Shingo; Koide, Tadashi; Wakabayashi, Shin’ichi

doi:10.1109/iscas.2000.855997

Cited by 41 publications

(25 citation statements)

References 8 publications

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“…Common topology preserving crossover (CTPX) is a special crossover which preserves the common characteristics of the parents in regards to the relative position [18]. In CTPX, first the longest common subsequences (LCSs) of the parents' SQ are found.…”

Section: Outer Loop Implementationmentioning

confidence: 99%

Automatic layout design for power module

Ning

Wang

Ngo

2010

2010 IEEE Energy Conversion Congress and Exposition

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The layout of power modules is one of the key points in power module design, especially for high power densities, where couplings are increased. In this paper, along with the design example, an automatic design processes by using genetic algorithm are presented. Some practical considerations and implementations are introduced in the optimization of the layout design of the module. Abstract -Layout, genetic algorithms, parasitic parameters

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Section: Outer Loop Implementationmentioning

confidence: 99%

Automatic layout design for power module

Ning

Wang

Ngo

2010

2010 IEEE Energy Conversion Congress and Exposition

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“…Genetic algorithm is a powerful search tool, particularly when applied for combinatorial optimization problems. Genetic algorithm operates on -populations‖ of potential solutions, usually referred to as -chromosomes‖ [5] [6] .…”

Section: Introductionmentioning

confidence: 99%

A New Approach to Solve the TSP using an Improved Genetic Algorithm

Gao¹,

Cho²,

Xi³

2011

International Journal of Fuzzy Logic and Intelligent Systems

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Genetic algorithms are one of the most important methods used to solve the Traveling Salesman Problem. Therefore, many researchers have tried to improve the Genetic Algorithm by using different methods and operations in order to find the optimal solution within reasonable time. This paper intends to find a new approach that adopts an improved genetic algorithm to solve the Traveling Salesman Problem, and compare with the well known heuristic method, namely, Kohonen Self-Organizing Map by using different data sets of symmetric TSP from TSPLIB. In order to improve the search process for the optimal solution, the proposed approach consists of three strategies: two separate tour segments sets, the improved crossover operator, and the improved mutation operator. The two separate tour segments sets are construction heuristic which produces tour of the first generation with low cost. The improved crossover operator finds the candidate fine tour segments in parents and preserves them for descendants. The mutation operator is an operator which can optimize a chromosome with mutation successfully by altering the mutation probability dynamically. The two improved operators can be used to avoid the premature convergence. Simulation experiments are executed to investigate the quality of the solution and convergence speed by using a representative set of test problems taken from TSPLIB. The results of a comparison between the new approach using the improved genetic algorithm and the Kohonen Self-Organizing Map show that the new approach yields better results for problems up to 200 cities.

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“…The proposed method is based on genetic algorithms (GA) [2][3][4][5][6][7][8][9][10][11][12]. In a previous study [12] the authors applied a GA to cell placement problems and confirmed its effectiveness as a working principle.…”

Section: Introductionmentioning

confidence: 99%

“…In particular, generation change is performed repeatedly by applying three genetic operations (selection, crossover, mutation), and the population evolves toward an optimal solution. There are several studies dealing with the application of GAs to LSI layout problems such as the floor plan [5,6] and channel routing [7][8][9][10][11]. However, the method proposed in this study takes a new approach of performance-driven placement aiming at low power consumption.…”

Section: Introductionmentioning

confidence: 99%

Performance-driven placement procedure for low power

Yoshikawa

Terai

2005

Elect. Eng. Jpn.

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SUMMARYDeep-Sub-Micron (DSM) technologies of 0.18 µm and below enable the integration of logical circuits having more than 10 million gates. In such a DSM technology, it is important to consider reducing power consumption, improving interconnection delay, and dispersing wire congestion at the initial phase of layout design. In this paper, we proposed a novel performance-driven placement algorithm. The proposed algorithm based on Genetic Algorithm (GA) has a two-level hierarchical structure. For selection control, new objective functions are introduced for reducing power consumption, improving interconnection delay, and dispersing wire congestion. Studies on floor planning and cell placement have been reported as being applications of GA to the LSI layout problem. However, no studies have ever seen the effect of applying GA with consideration of power, delay, and congestion. Results show improvement of 11.7% for the total wire length of the nets with high SW rate, 22.5% for the worst path delay, and 15.9% for wire congestion on average.

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An adaptive genetic algorithm for VLSI floorplanning based on sequence-pair

Cited by 41 publications

References 8 publications

Automatic layout design for power module

Automatic layout design for power module

A New Approach to Solve the TSP using an Improved Genetic Algorithm

Performance-driven placement procedure for low power

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