An algorithm for single-row routing with prescribed street congestions

Tsukiyama, Shuji; Kuh, E.S.; Shirakawa, Isao

doi:10.1109/tcs.1980.1084890

Cited by 40 publications

(16 citation statements)

References 8 publications

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“…A number of researchers have developed necessary and sufficient conditions for a net set to be realizable [2,5]. That is, conditions that are not only adequate for an optimal solution to exist, but also essential.…”

Section: Existing Solutions For the Srr Problemmentioning

confidence: 99%

“…For very limited cases (street widths # 3). Tsukiyama et al [5] developed an O(mn ) algorithm to solve the routing problem. A faster algorithm has been developed by Raghavan and Sahni [3].…”

Section: Existing Solutions For the Srr Problemmentioning

confidence: 99%

“…All of the remaining unit intervals are sorted into the following order: [3,4], [5,6], [9,10], [11,12], [4,5], [10,11]. We begin by examining the interval [3,4] with density I ¼ 3; to see if the sufficient condition holds for this interval, i.e.…”

Section: Some Examples Of Heuristic Algorithmsmentioning

confidence: 99%

“…Thus b 5 represents the pin located at the intersection of the bth row and the 5th column. Suppose that the problem is to route the net list L ¼ {N 1 ; N 2 ; N 3 } where N 1 ¼ {a 1 ; b 5 ; e 9 }; N 2 ¼ {c 1 ; c 3 ; d 5 }; and N 3 ¼ {a 7 ; c 5 ; d 7 ; e 5 }: This implies that pins a 1 , b 5 , and e 9 in net N 1 are to be interconnected, as are the pins in N 2 and N 3 , respectively.…”

Section: Introductionmentioning

confidence: 99%

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The Single Row Routing Problem Revisited: A Solution Based on Genetic Algorithms

1999

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With the advent of VLSI technology, circuits with more than one million transistors have been integrated onto a single chip. As the complexity of ICs grows, the time and money spent on designing the circuits become more important. A large, often dominant, part of the cost and time required to design an IC is consumed in the routing operation. The routing of carriers, such as in IC chips and printed circuit boards, is a classical problem in Computer Aided Design. With the complexity inherent in VLSI circuits, high performance routers are necessary. In this paper, a crucial step in the channel routing technique, the single row routing (SRR) problem, is considered. First, we discuss the relevance of SRR in the context of the general routing problem. Secondly, we show that heuristic algorithms are far from solving the general problem. Next, we introduce evolutionary computation, and, in particular, genetic algorithms (GAs) as a justifiable method in solving the SRR problem. Finally, an efficient O(nk ) complexity technique based on GAs heuristic is obtained to solve the general SRR problem containing n nodes. Experimental results show that the algorithm is faster and can often generate better results than many of the leading heuristics proposed in the literature.

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Section: Existing Solutions For the Srr Problemmentioning

confidence: 99%

Section: Existing Solutions For the Srr Problemmentioning

confidence: 99%

Section: Some Examples Of Heuristic Algorithmsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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The Single Row Routing Problem Revisited: A Solution Based on Genetic Algorithms

1999

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“…Our choice of I , specified in (21) guarantees that b, < b, < b, and that a, < a,, a, < a, < a,. (29) By virtue of (28) Theorems 6.1 and 6.2 combined motivate us to call a family I of intervals admissible if it does not contain a forbidden triple. A collection 3Vof nets is routable without street crossovers only if the corresponding family of intervals is admissible.…”

Section: (23)mentioning

confidence: 99%

A time- and cost-optimal algorithm for interlocking sets-with applications

Olariu

Zomaya²

1996

IEEE Trans. Parallel Distrib. Syst.

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Given a family l o f intervals, two intervals in Iinterlock if they overlap but neither of them strictly contains the other. A set of intervals in which every two are related in the reflexive transitive closure of the interlock relation is referred to as an interlocking set. The task is determining the maximal interlocking sets of Iarises in numerous applications, including traffic control, robot arm manipulation, segmentation of range images, routing, automated surveillance systems, recognizing polygonal configurations, and code generation for parallel machines. Our first contribution is to show that any sequential algorithm that computes the maximal interlocking sets of a family of n intervals must take Q(n log n) time in the algebraic tree model. Next, we show that any parallel algorithm for this problem must take Q(log n) time in the CREW model even if an infinite number of processors and memory cells are available. We then go on to show that both the sequential and the parallel lower bounds are tight by providing matching algorithms running, respectively, in @(n log n) sequential time and in @(log n) time using n processors in the CREW model. At the same time, if the endpoints of the intervals are specified in sorted order, our sequential algorithm runs in O(n) time, improving the best previously known result. It is interesting to note that even if the endpoints are sorted, R(log n) is a time lower bound for solving the problem in the CREW model, regardless of the amount of resources available. As an application of our algorithm for interlocking sets, we obtain a time-and cost-optimal solution to a restricted version of the single row routing problem. The best previously known result for routing a set of n nets without street crossovers runs in O(log n loglog n) time using n processors in the CRCW model. By contrast, our algorithm runs in @(log n) time using processors in the CREW model, being both time-and cost-optimal.

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A routing system based on a single‐row router and its wirability

Asahara

Odani

Ogura

et al. 1981

Circuit Theory & Apps

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SUMMARYA new routing system is described, which can be applied to printed wiring boards of different wiring densities such that the number of wiring tracks permitted between two consecutive pins of an ordinary dual in line package ranges from one to four. This system is distinctive in that a single-row router is combined with a line-search router in such a way that the search for possible wire segments at the stage of the line search router is implemented channel by channel, with all interconnections within each channel completed later by the single-row router.The program operates on an ACOS 77/900 computer, and has been applied to numbers of boards. Some of the implementation results are also shown to reveal how much the described system may attain its potentialities in the practice of layout of high density printed wiring boards.

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An algorithm for single-row routing with prescribed street congestions

Cited by 40 publications

References 8 publications

The Single Row Routing Problem Revisited: A Solution Based on Genetic Algorithms

The Single Row Routing Problem Revisited: A Solution Based on Genetic Algorithms

A time- and cost-optimal algorithm for interlocking sets-with applications

A routing system based on a single‐row router and its wirability

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