An Analytical Approach for Quantifying Clock Jitter Effects in Continuous-Time Sigma&amp;#8211;Delta Modulators

Chang, Yuan-Shuo; Lin, Chia-Liang; Wang, Wen-Shan; Lee, Chao-Cheng; Shih, Chih-Yung

doi:10.1109/tcsi.2006.880035

Cited by 15 publications

(15 citation statements)

References 7 publications

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“…This is important, because the shape of the jitter spectrum has a significant influence on the total amount of in-band jitter-caused noise at the output of the modulator, even if the total clock jitter power remains unchanged. This was already shown in several more recent papers, which did include the effect of the jitter spectrum ( [5,6]) on the CTSDM's performance.…”

Section: Introductionsupporting

confidence: 52%

“…Sometimes also high frequency spurs ( [22, p. 17]) are present in j(n). As was done in [6], where CTSDMs were considered, we will model the jitter, j, as white Gaussian noise, j 0 , which has been filtered by a low pass filter, LP j (z). This is depicted at Fig 8. By a suitable choice of the filter LP j , we can shape the spectrum of j(n) to mimic a broad range of real world jitter spectra.…”

Section: A Clock Jittermentioning

confidence: 99%

“…It is well known that a jittered clock degrades the performance of a continuous time sigma delta modulator ( [2,5,6]). In the following, we will apply the analysis of [2] on SOSDMs.…”

Section: B Jitter-caused Errorsmentioning

confidence: 99%

See 2 more Smart Citations

Analyzing the Effect of Clock Jitter on Self-Oscillating Sigma Delta Modulators

Vercaemer

Rombouts

2016

IEEE Trans. Circuits Syst. I

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Abstract-This paper presents simple but accurate expressions for the noise components caused by clock jitter, in the output signal of Self-Oscillating Sigma Delta Modulators (SOSDMs). Contrary to conventional Continuous Time Sigma Delta Modulators (CTSDM), the SOSDM's loop contains a strong oscillation, whose attribution to the system's jitter caused noise has not previously been explored. In this paper, the SOSDM system is modeled, and the effect of the self oscillation, the input signal and the quantization noise on the jitter caused noise in the output signal, is calculated. Results are confirmed by system level simulations.

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Section: Introductionsupporting

confidence: 52%

Section: A Clock Jittermentioning

confidence: 99%

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Analyzing the Effect of Clock Jitter on Self-Oscillating Sigma Delta Modulators

Vercaemer

Rombouts

2016

IEEE Trans. Circuits Syst. I

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“…Fig. 2 shows the clock jitter modeling for CT ΣΔMs, where the jitter induced noise E j (z) is added to the DAC output, and J(z) represents the timing error [10]. The jitter was assumed as white Guassian noise.…”

Section: Effect Of Clock Jitter and Excess Loop Delaymentioning

confidence: 99%

Mixed CT/DT Cascaded Sigma-Delta Modulator

Lee¹

2009

JSTS:Journal of Semiconductor Technology and Science

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“…Its standard deviation is denoted as σ CLK J in this paper. Clock jitter effects in CTDSM have been well studied in literature [6,[8][9][10][11][12][13][14][15]. In CTDSM, clock jitter affects the ideal modulator operation in three ways, which is illustrated in Figure 1, considering the general case of a return-to-zero feedback.…”

Section: Introductionmentioning

confidence: 99%

Review and Comparison of Clock Jitter Noise Reduction Techniques for Lowpass Continuous-Time Delta-Sigma Modulators

Chang

Tang

2017

JLPEA

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Abstract:It is well known that continuous-time Delta-Sigma modulators are very sensitive to clock jitter effects. In literature, a number of techniques have been proposed to cope with them. In this brief, we present a detailed review and comparison of the reported techniques. While the effectiveness to reduce clock jitter effects may be of most importance in this comparison, we also consider other performance metrics such as circuit complexity and overhead to implement the technique, power consumption overhead of technique, synthesis complexity incurred in system-level design, extensibility of the technique from single-bit to multi-bit operation, and robustness to process variation. When clock jitter is relatively large, the fixed-width pulse feedback technique is most effective to reduce clock jitter effects among all techniques at high sampling frequency, while switched-capacitor-resistor and switched-shaped current techniques have best performance at medium frequency or below.

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An Analytical Approach for Quantifying Clock Jitter Effects in Continuous-Time Sigma–Delta Modulators

Cited by 15 publications

References 7 publications

Analyzing the Effect of Clock Jitter on Self-Oscillating Sigma Delta Modulators

Analyzing the Effect of Clock Jitter on Self-Oscillating Sigma Delta Modulators

Mixed CT/DT Cascaded Sigma-Delta Modulator

Review and Comparison of Clock Jitter Noise Reduction Techniques for Lowpass Continuous-Time Delta-Sigma Modulators

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