2018 IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering (EIConRus) 2018
DOI: 10.1109/eiconrus.2018.8317379
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An approach to automatic test generation for verification of microprocessor cores

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Cited by 5 publications
(3 citation statements)
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“…Numerous methodologies, such as those in Maurer et al [11], Leonhardt et al [12], and Larisa et al [13], leverage implicit relationships to facilitate test generation, execution, and evaluation, while others, like in Labiche et al [14], utilize implicit relationships for regression testing. Additional methods use explicit relationships to aid in test generation as in Bertolino et al [15], test execution and evaluation as in Nachmanson et al [16], or coverage analysis.…”
Section: Related Workmentioning
confidence: 99%
“…Numerous methodologies, such as those in Maurer et al [11], Leonhardt et al [12], and Larisa et al [13], leverage implicit relationships to facilitate test generation, execution, and evaluation, while others, like in Labiche et al [14], utilize implicit relationships for regression testing. Additional methods use explicit relationships to aid in test generation as in Bertolino et al [15], test execution and evaluation as in Nachmanson et al [16], or coverage analysis.…”
Section: Related Workmentioning
confidence: 99%
“…Some approaches as in [22], [23] and [24] use implicit relationships to support test generation, execution and evaluation; while others like in [25] use implicit relationships to support regression testing. Further approaches use explicit relationships to support test generation [26], test execution and evaluation [27], or coverage analysis.…”
Section: Related Workmentioning
confidence: 99%
“…In this paper, we focus on debugging the multicore systems which is popular nowadays and propose an automatic debugging tool that leverages the synchronization points to help locating the error-triggered instructions. The current works about multicore systems concentrate on accelerating verification by improving the technique of random test generation [2], [4], [5], [7] and verifying cache coherency [2], [3], [4]. Also, some works are related to the verification of timings [6] and speed debugging the DUT [8].…”
Section: Introductionmentioning
confidence: 99%