SummaryThis paper explores the many interesting implications for oscillator design, with optimized phase‐noise performance, deriving from a newly proposed model based on the concept of oscillator conjugacy. For the case of 2‐D (planar) oscillators, the model prominently predicts that only circuits producing a perfectly symmetric steady‐state can have zero amplitude‐to‐phase (AM‐PM) noise conversion, a so‐called zero‐state. Simulations on standard industry oscillator circuits verify all model predictions and, however, also show that these circuit classes cannot attain zero‐states except in special limit‐cases which are not practically relevant. Guided by the newly acquired design rules, we describe the synthesis of a novel 2‐D reduced‐order LC oscillator circuit which achieves several zero‐states while operating at realistic output power levels. The potential future application of this developed theoretical framework for implementation of numerical algorithms aimed at optimizing oscillator phase‐noise performance is briefly discussed.