An FPGA-based architecture for a local tone-mapping operator

Abstract

This paper presents an FPGA-based architecture for local tone mapping of gray scale high dynamic range images. The architecture is described in VHDL and has been synthesized using Altera Quartus tools. It achieves an operating frequency consistent with a video rate of 60 frames per second for a frame of 1,024 9 768 pixels. The proposed architecture is a modification of the nine-scale Reinhard operator. Approximations to the original Reinhard operator ensure that the operator is amenable to implementation in hardware. A peak signal-to-noise ratio study shows that our fixed-point hardware approximation produces results similar to a floating-point original.

Multi-camera platform for panoramic real-time HDR video construction and rendering

“…Thus, many attempts have been made to develop a dedicated hardware processing system for this purpose. Hassan and Carletta [29,30] proposed an FPGA architecture for Reinhard [19] and Fattal [20] local operators. Even though the proposed implementations concern only the tone mapping operator, the designs require a lot of resources.…”

“…Even though the proposed implementations concern only the tone mapping operator, the designs require a lot of resources. This originates from the Gaussian pyramid and look-up table (LUT) implementation of the logarithm function [29] and a local Poisson solver [30]. Another FPGA system was implemented by Lapray et al [31,32].…”

Hardware Implementation of an Automatic Rendering Tone Mapping Algorithm for a Wide Dynamic Range Display

“…An FPGA-based architecture by Hassan et al [33] implements a modification of the local tone mapping operator by Reinhard et al [18]. Modifications were made to the original local tone mapping operator in order to reduce the hardware complexity of the algorithm.…”

Performance Optimization and FPGA Implementation of Real-Time Tone Mapping

“…Since they differently operate on different regions of the image, they are significantly more expensive and resourcedemanding. Hassan and Carletta [11] proposed an FPGA architecture for Reinhard operator [12], which introduces a local adaptation inspired by photographic film development in order to avoid halo artifacts. However, the proposed local adaptation requires a Gaussian pyramid decomposition, which requires a vast amount of resources, especially in terms of the required memory.…”

“…However, the proposed local adaptation requires a Gaussian pyramid decomposition, which requires a vast amount of resources, especially in terms of the required memory. Additionally, Hassan and Carletta [11] propose to estimate the logarithm function by the integer part of the operand and then refine it using the look-up table (LUT) with a fixed number of bits. A large number of bits should be considered in order to preserve the dynamic range, which enlarges the LUT size even further.…”