An improved and automated design tool for the optimization of CMOS OTAs using geometric programming

Oliveros, Jorge; Cabrera, Dwight; Roa, Elkim; Noije, Wilhelmus Van

doi:10.1145/1404371.1404415

Cited by 11 publications

(8 citation statements)

References 8 publications

(16 reference statements)

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“…Since GPs also admit posynomial constraints, another approach is to directly fit w as a posynomial function of u. This approach has been used by a number of authors [8,16,23]. Typically mixed results are reported, with max-monomial functions performing better on data with sharp kinks, and posynomial functions performing better on smoother data [4,17].…”

Section: Implicit Softmax-affine Functionsmentioning

confidence: 99%

Data fitting with geometric-programming-compatible softmax functions

2016

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Motivated by practical applications in engineering, this article considers the problem of approximating a set of data with a function that is compatible with geometric programming (GP). Starting with well-established methods for fitting max-affine functions, it is shown that improved fits can be obtained using an extended function class based on the softmax of a set of affine functions. The softmax is generalized in two steps, with the most expressive function class using an implicit representation that allows fitting algorithms to locally tune softness. Each of the proposed function classes is directly compatible with the posynomial constraint forms in geometric programming. Maxmonomial fitting and posynomial fitting are shown to correspond to fitting special cases of the proposed implicit softmax function class. The fitting problem is formulated as a nonlinear least squares regression, solved locally using a Levenberg-Marquardt algorithm. Practical implementation considerations are discussed. The article concludes with numerical examples from aerospace engineering and electrical engineering.

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Section: Implicit Softmax-affine Functionsmentioning

confidence: 99%

Data fitting with geometric-programming-compatible softmax functions

2016

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“…Optimal design of a CMOS operational amplifier using geometric programming (GP) is reported in . GP is also applied for the minimization of power dissipation in different Operational transconductance amplifier (OTA) structures . GA is a widely employed meta‐heuristic approach in automation of analog IC transistor sizing.…”

Section: Introductionmentioning

confidence: 99%

Soft computing‐based approach for optimal design of on‐chip comparator and folded‐cascode op‐amp using colliding bodies optimization

Kar

Mandal

et al. 2016

Int J Numerical Modelling

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This paper presents an efficient approach for the optimal designs of two analog circuits, namely complementary metal oxide semiconductor) two-stage comparator with p-channel metal oxide semiconductor input driver and n-channel input and folded-cascode operational amplifier using a recently proposed meta-heuristic-based optimization algorithm named as colliding bodies optimization (CBO). It is a multi-agent algorithm that does not depend upon any internal control parameter, making the algorithm extremely simple. The main objective of this paper is to optimize the metal oxide semiconductor (MOS) transistors' sizes using CBO in order to reduce the areas occupied by the circuits and to get better performance parameters of the circuits. Simulation Program with Integrated Circuit Emphasis simulation has been carried out by using the optimal values of MOS transistors' sizes and other design parameters to validate that CBO-based design is satisfying the desired specifications. Simulation results demonstrate that the design specifications are closely met and the required functionalities are achieved. The simulation results also confirm that the CBO-based approach is superior to the other algorithms in terms of MOS area and performance parameters like gain, power dissipation, etc., for the examples considered.For CBO, number of colliding bodies (CBs) is taken as 10 and dimensions of each CB is defined as X Comparator = [SR, A vd , V IC(min) , V IC(max) ]. So, the dimension of the optimization problem is 4. 878 B. P. DE ET AL.

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“…A programação geométricá e aplicada ao projeto de circuitos incluindo uma ou mais medidas de desempenho (consumo de potência, ruído, largura de banda, ganho, etc) na função objetivo e colocando as especificações de projeto e leis elétricas como restrições f i e g j . No entanto, a dificuldade está no fato que as funções f obj e f i devem ter forma de posinômios e as funções g j devem ter forma de monômios [17].…”

Section: Programa Geométricounclassified

“…Nos casos em que as funções não cumprem com a forma padrão do PG, essas funções podem ser aproximadas para um intervalo no qual as funções que cumprem com a forma padrão mediante um ajuste de curvas [17]. Novamente, um bom ajuste depende de uma boa seleção das variáveis.…”

Section: Programa Geométricounclassified

Projeto de um sintetizador de frequência multipadrão em tecnologia CMOS.

Cabrera¹

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ResumoNesta dissertaçãoé apresentado o projeto de um sintetizador de frequência atingindo as especificações dos padrões de comunicação sem-fio GSM e Bluetooth. O sintetizadoré baseado em um PLL (P hase Locked Loop) de arquitetura N-fracionário com modulador Σ∆. No primeiro estágio do projeto do sintetizadoré proposto um algoritmo para o plano de frequências, o qual considera a caraterística multipadrão do sintetizador. O projeto dos blocos que compõem o PLL (VCO, divisores de frequência, modulador Σ∆, PFD e bomba de carga)é apresentado junto com o layout e algumas simulações. A programação geométricaé aplicada ao projeto do VCO. Finalmente,é proposta uma estratégia para o projeto do filtro atingindo as especificações do sintetizador de frequência. O circuito projetado foi fabricado no processo CMOS 0,35µm da AMS (Austria M icro Systems). Todos os componentes do PLL foram integrados no chip incluindo o VCO e o filtro, e aárea total foi de 0,9mm 2 incluindo os pads. O circuito projetado tem um baixo consumo de potência de 14mW usando uma tensão de alimentação de 3V. O ruído de fase medido foi -114dBc/Hz@400kHz no caso de GSM (F OU T =902,6MHz) e -121dBc/Hz@3MHz no caso de Bluetooth (F OU T =2,44GHz). A resposta transiente do PLL quando muda desde o primeiro até oúltimo canal para cada padrão foi testada, o lock time medido em GSM foi de 208µs e 157µs em Bluetooth. O objetivo principal do funcionamento multipadrão, queé o uso compartilhado da maioria dos blocos por todos os padrões, foi atingido.As caraterísticas de desempenho medidas mostram excelente concordância com os valores simulados, indicando oêxito das estratégias usadas no projeto, simulação e teste do sintetizador de frequência. Os resultados foram comparados com outros trabalhos publicados mostrando que o sintetizador projetado neste trabalho tem menor consumo de potência e pequena ocupação deárea. Palavras-chave: Sintetizador de frequência. Multipadrão. Circuitos integrados MOS. AbstractThis work presents the design of a frequency synthesizer achieving the specifications of the GSM and Bluetooth standards. The frequency synthesizer is based on a PLL (Phase Locked Loop) of N-fractional architecture using a Σ∆ modulator. In the first step of the frequency synthesizer design an algorithm for the frequency plan, considering the multistandard characteristic of the synthesizer, was proposed. The design of the building blocks of the PLL (VCO, frequency dividers, Σ∆ modulator, PFD and charge pump) is presented together with the layout and some simulation results. Geometric programming was applied to the VCO design. Finally, an strategy for the filter design achieving the frequency synthesizer specifications was proposed. The designed synthesizer was fabricated in the 0.35µm CMOS process of AMS (Austria Micro Systems). All the PLL components were integrated on-chip including the VCO and the filter, the occupied area was 0.9mm 2 with the pads. The designed circuit has a low power consumption of 14mW using a 3V voltage supply. The phase noise measured for GSM (F ...

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An improved and automated design tool for the optimization of CMOS OTAs using geometric programming

Cited by 11 publications

References 8 publications

Data fitting with geometric-programming-compatible softmax functions

Data fitting with geometric-programming-compatible softmax functions

Soft computing‐based approach for optimal design of on‐chip comparator and folded‐cascode op‐amp using colliding bodies optimization

Projeto de um sintetizador de frequência multipadrão em tecnologia CMOS.

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