An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

Waldron, Niamh; Merckling, Clément; Guo, Weiming; Ong, Patrick; Teugels, Lieve; Ansar, Sheikh; Tsvetanova, Diana; Sebaai, Farid; Dorp, Dennis H. van; Milenin, Alexey; Lin, Dennis; Nyns, L.; Mitard, J.; Pourghaderi, Ali; Douhard, Bastien; Richard, Olivier; Bender, Hugo; Boccardi, G.; Caymax, Matty; Heyns, Marc; Vandervorst, Wilfried; Barla, K.; Collaert, N.; Thean, A.

doi:10.1109/vlsit.2014.6894349

Cited by 68 publications

(56 citation statements)

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“…A replacement in process (See Fig. 14) was recently developed to fabricate InGaAs FinFETs on 300 mm Si substrates [124]. A sequence of epitaxial growth and CMP steps were used to form the InGaAs channel.…”

Section: U N C O R R E C T E D P R O O F Q Li Km Lau Progress In mentioning

confidence: 99%

Epitaxial growth of highly mismatched III-V materials on (001) silicon for electronics and optoelectronics

Lau

2017

Progress in Crystal Growth and Characterization of Materials

125

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Please note: Changes made as a result of publishing processes such as copy-editing, formatting and page numbers may not be reflected in this version. For the definitive version of this publication, please refer to the published source. You are advised to consult the publisher's version if you wish to cite this paper.This version is being made available in accordance with publisher policies. See http://orca.cf.ac.uk/policies.html for usage policies. Copyright and moral rights for publications made available in ORCA are retained by the copyright holders. U N C O R R E C T E D P R O O F ARTICLE INFO ABSTRACTMonolithic integration of III-V on silicon has been a scientifically appealing concept for decades. Notable progress has recently been made in this research area, fueled by significant interests of the electronics industry in high-mobility channel transistors and the booming development of silicon photonics technology. In this review article, we outline the fundamental roadblocks for the epitaxial growth of highly mismatched III-V materials, including arsenides, phosphides, and antimonides, on (001) oriented silicon substrates. Advances in hetero-epitaxy and selective-area hetero-epitaxy from micro to nano length scales are discussed. Opportunities in emerging electronics and integrated photonics are also presented.

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Section: U N C O R R E C T E D P R O O F Q Li Km Lau Progress In mentioning

confidence: 99%

Epitaxial growth of highly mismatched III-V materials on (001) silicon for electronics and optoelectronics

Lau

2017

Progress in Crystal Growth and Characterization of Materials

125

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“…These improvements on capacitance level are reflected by the electrical metrics on transistor level, as evident from the data in Figure 5. InGaAs FinFET [2] InGaAs QWFET [6] InAs QWFET [7] InGaAs QWFET [8] InGaAs QWFET [9] InAs QWFET [10] InGaAs FinFET [14] InGaAs NWFET [15], [16] This Work…”

Section: Methodsmentioning

confidence: 99%

“…Doornbos fin [14]- [16] and wide-field hetero-epitaxy [17]. To date, the performance gap between the best III-V MOSFET on native III-V substrates (Q = 32 [10]), and the best device on 300 mm Si substrates (Q = 20 [16]) remains large.…”

Section: Introductionmentioning

confidence: 99%

High-Performance InAs Gate-All-Around Nanowire MOSFETs on 300 mm Si Substrates

Doornbos¹,

Holland²,

Vellianitis³

et al. 2016

IEEE J. Electron Devices Soc.

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> To be considered for J-EDS special issue on "Advanced technology for ultra-low power electronic devices" < 1  Abstract-We report on the first realization of InAs n-channel gate-all-around nanowire MOSFETs on 300 mm Si substrates using a fully VLSI-compatible flow. Scaling of the equivalent oxide thickness EOT in conjunction with high- dielectric engineering improves the device performance; with an optimized gate stack having an EOT of 1.0 nm, the sub-threshold swing S is 76.8 mV/dec., and the peak transconductance g m is 1.65 mS/μm, at V ds of 0.5 V, for a gate-all-around nanowire MOSFET having a gate length L g of 90 nm, a nanowire height H NW of 25 nm, and a nanowire width W NW of 20 nm, resulting in Q ≡ g m /S = 21.5, a record for InAs on silicon. Furthermore, we report a source/drain resistance R sd of 160-200 Ω•μm, amongst the lowest values reported for III-V MOSFETs. Our VLSI-compatible process provides high device yield, which enables statistically reliable extraction of electron transport parameters, such as unidirectional thermal velocity v tx of 3-4×10 7 cm/s and backscattering coefficient r c as a function of gate length.Index Terms-High-mobility channel, MOSFET, Nanowires, III-V semiconductor materials.

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“…Much attention has now turned to tri-gate devices with III-V channels. Significant advances in performance and understanding have been made in this area [8][9][10][11][12], including the first example of a replacement fin III-V FinFET on a 300 mm silicon platform [13]. Electron transport metrics such as injection velocity improve with increasing In mole fraction x in In x Ga 1-x As approaching 4•10 7 cm/s for InAs [2] making an InAs channel particularly attractive for N-FETs.…”

Section: Introductionmentioning

confidence: 99%

InAs FinFETs With H_finnm Fabricated Using a Top–Down Etch Process

Oxland

Chang

et al. 2016

IEEE Electron Device Lett.

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An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

Cited by 68 publications

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Epitaxial growth of highly mismatched III-V materials on (001) silicon for electronics and optoelectronics

Epitaxial growth of highly mismatched III-V materials on (001) silicon for electronics and optoelectronics

High-Performance InAs Gate-All-Around Nanowire MOSFETs on 300 mm Si Substrates

InAs FinFETs With H_finnm Fabricated Using a Top–Down Etch Process

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An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

Cited by 68 publications

References 0 publications

Epitaxial growth of highly mismatched III-V materials on (001) silicon for electronics and optoelectronics

Epitaxial growth of highly mismatched III-V materials on (001) silicon for electronics and optoelectronics

High-Performance InAs Gate-All-Around Nanowire MOSFETs on 300 mm Si Substrates

InAs FinFETs With Hfinnm Fabricated Using a Top–Down Etch Process

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InAs FinFETs With H_finnm Fabricated Using a Top–Down Etch Process