An Intuitive Analysis of Phase Noise Fundamental Limits Suitable for Benchmarking LC Oscillators

Analysis and Design of a 195.6 dBc/Hz Peak FoM P-N Class-B Oscillator With Transformer-Based Tail Filtering

“…Oscillator topology affects the power vs phase noise trade-off in two equally important ways. First, acting on the conversion of circuit noise into phase noise through the impulse sensitivity function (ISF) [1]; second, changing the maximum achievable power conversion efficiency ( ), i.e., the conversion of DC power ( ) into resonator RF power ( ), which directly affects phase noise [2]. The use of voltage-biased topologies Manuscript [3]- [5] eliminates a source of phase noise (i.e., the current generator) and improves power efficiency, but increases the sensitivity to supply voltage variations.…”

“…In class-F oscillators [9] a non-sinusoidal waveform is created using higher order resonators, increasing the signal slope and reducing the ISF. However, as shown in [2] this requires multiple high-inductors. Alternatively, the multiple resonances of a transformer can be exploited, reducing area occupation.…”

“…However, the peak voltage swings of about three times the supply voltage forces the choice of a low supply voltage (0.4 V in [4], [10]) and results in frequency pushing. Among the proposed solutions [3], [4], [7], [9]- [27], the one that has achieved the best efficiency, as measured by the Excess Noise Factor (ENF) [2], is the Class-B oscillator with an additional LC tank (resonating at ) inserted at the source of the active devices [26]. The switching transistors can enter the triode region without loading the tank since, intuitively they see a high impedance in series with them, effectively altering the active devices ISF in a way similar to the class-oscillator in [28], achieving high and low phase noise.…”

Analysis of frequency and amplitude in CMOS differential ring oscillators

“…The derivation for the above equation assumes that the equivalent resistance of the PMOS load is constant, according to (9). To ensure an improved evaluation of analysis an external resistance load (R L ) was used instead of a PMOS load in some simulations, as shown in Fig.…”

Analysis of power consumption in LC oscillators based on the inversion coefficient

“…The role of C tail is to allow a more efficient generation of the current first harmonic, so that a higher oscillation amplitude can be obtained out of the same bias current [5]. Indeed, it prevents the source node from swinging, providing sharp current spikes at the peak of voltage swing [6]. The current waveform doesn't look like a square wave anymore but it shows narrow and high pulses, since the active transistor conducts for less than half a period (conduction angle < 180 • ).…”