2021
DOI: 10.1007/s10470-021-01863-6
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An optimization of a non-volatile latch using memristors for sequential circuit applications

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Cited by 3 publications
(3 citation statements)
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“…Our MRL inverter-based non-volatile memristor-based D latch has a small size of 42 F 2 compared to the other non-volatile topologies [ 7 – 9 , 14 , 15 ] due to the fewest number of components used, as shown in Table 3 . The simulated results revealed that the non-volatile latch has better energy efficiency and more power consumption than the CMOS latch.…”
Section: Resultsmentioning
confidence: 99%
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“…Our MRL inverter-based non-volatile memristor-based D latch has a small size of 42 F 2 compared to the other non-volatile topologies [ 7 – 9 , 14 , 15 ] due to the fewest number of components used, as shown in Table 3 . The simulated results revealed that the non-volatile latch has better energy efficiency and more power consumption than the CMOS latch.…”
Section: Resultsmentioning
confidence: 99%
“…The proposed MRL inverter-based non-volatile latch reduces the area to 42 F 2 from 48 F 2 . The non-volatile latch is proved to be the best in terms of area and power than the non-volatile latches in [ 7 – 9 , 14 , 16 ]. It is better even in store and restore activities.…”
Section: Resultsmentioning
confidence: 99%
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