An ultra-low-power analog memory system with an adaptive sampling rate

Kelly, Brandon M.; Rumberg, Brandon; Graham, David

doi:10.1109/mwscas.2012.6292017

Cited by 5 publications

(12 citation statements)

References 9 publications

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“…The RAMP device could be used to implement a variety circuits capable of finding triggers embedded within the signal that can be used to initiate conversion. We have chosen to focus on the detection of local extrema (i.e., local maxima and minima) to implement an 'extrema sampling' system [9,22]. In extrema sampling, the local minimum/maximum voltages are converted when the first derivative of the input is zero.…”

Section: Extrema Samplingmentioning

confidence: 99%

Reconfigurable Analog Preprocessing for Efficient Asynchronous Analog-to-Digital Conversion

Kelly

DiLello

Graham

2019

JLPEA

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Wearable medical devices, wireless sensor networks, and other energy-constrained sensing devices are often concerned with finding specific data within more-complex signals while maintaining low power consumption. Traditional analog-to-digital converters (ADCs) can capture the sensor information at a high resolution to enable a subsequent digital system to process for the desired data. However, traditional ADCs can be inefficient for applications that only require specific points of data. This work offers an alternative path to lower the energy expenditure in the quantization stage-asynchronous content-dependent sampling. This asynchronous sampling scheme is achieved by pairing a flexible analog front-end with an asynchronous successive-approximation ADC and a time-to-digital converter. The versatility and reprogrammability of this system allows a multitude of event-driven, asynchronous, or even purely data-driven quantization methods to be implemented for a variety of different applications. The system, fabricated in standard 0.5 µm and 0.35 µm processes, is demonstrated along with example applications with voice, EMG, and ECG signals.

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Section: Extrema Samplingmentioning

confidence: 99%

Reconfigurable Analog Preprocessing for Efficient Asynchronous Analog-to-Digital Conversion

Kelly

DiLello

Graham

2019

JLPEA

Self Cite

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“…Our approach to this problem is based on the knowledge that the Nyquist sampling criterion-that the sampling frequency must exceed twice the highest frequency of the signal-is excessive for most natural signals, wherein the highest frequencies are rarely present. Hence we have developed a memory system that adapts its sampling rate to the signal [233]. This method is shown in Fig.…”

Section: B2 Memory Bufferingmentioning

confidence: 99%

“…In our initial memory system [233], the data are stored in an array of sample-and-holds (discrete-time, continuous-valued memory). The power consumption of the max/min locator is 1.17µW and the power consumption of the 64-element sample-and-hold array is 2.35µW, yielding a total power of 3.52µW.…”

Section: B2 Memory Bufferingmentioning

confidence: 99%

“…For such situations, a memory buffer may be necessary to record the data. In [233], we described such a memory buffer which included an adaptive sampling approach to minimize the number of samples. In this Appendix, we discuss the detection time-lag for our Hibernets processors and we consider the feasibility of extending our previous memory buffer to a digital-storage format.…”

Section: Event Detection Time-lag and Memory Buffersmentioning

confidence: 99%

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Low-Power and Programmable Analog Circuitry for Wireless Sensors

Rumberg¹

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Embedding networks of secure, wirelessly-connected sensors and actuators will help us to conscientiously manage our local and extended environments. One major challenge for this vision is to create networks of wireless sensor devices that provide maximal knowledge of their environment while using only the energy that is available within that environment. In this work, it is argued that the energy constraints in wireless sensor design are best addressed by incorporating analog signal processors. The low power-consumption of an analog signal processor allows persistent monitoring of multiple sensors while the device's analog-to-digital converter, microcontroller, and transceiver are all in sleep mode. This dissertation describes the development of analog signal processing integrated circuits for wireless sensor networks. Specific technology problems that are addressed include reconfigurable processing architectures for low-power sensing applications, as well as the development of reprogrammable biasing for analog circuits. iii Dedication To faculty and peers who have been so helpful, To family who won't try to read beyond this pageand more so to those who will, And to anyone who may benefit from this work. Contents Dedication iii List of Figures ix List of Tables xii Symbols and Acronyms xiii 12 Conclusions and Future Work 160 References 162 A Background on Sub-Threshold Analog Circuits 181 A.

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“…By taking a signal and breaking it down by frequency spectrum, magnitude, or periodicity, analog electronics are capable of detecting events of interest. These events could include the onset of voice [24,25], the passing of a certain class of automobile [1], or the onset of a cardiac event within an electrocardiogram [26]. The detection of these events allows the system to selectively turn the quantization stage on only during events of interest.…”

Section: Analog Signal Conditioning and Pre-processingmentioning

confidence: 99%

Data Conversion Within Energy Constrained Environments

Kelly¹

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Within scientific research, engineering, and consumer electronics, there is a multitude of new discrete sensor-interfaced devices. Maintaining high accuracy in signal quantization while staying within the strict power-budget of these devices is a very challenging problem. Traditional paths to solving this problem include researching more energy-efficient digital topologies as well as digital scaling. This work offers an alternative path to lower-energy expenditure in the quantization stage-content-dependent sampling of a signal. Instead of sampling at a constant rate, this work explores techniques which allow sampling based upon features of the signal itself through the use of application-dependent analog processing. This work presents an asynchronous sampling paradigm, based off the use of floating-gate-enabled analog circuitry. The basis of this work is developed through the mathematical models necessary for asynchronous sampling, as well the SPICE-compatible models necessary for simulating floating-gate enabled analog circuitry. These base techniques and circuitry are then extended to systems and applications utilizing novel analog-to-digital converter topologies capable of leveraging the non-constant sampling rates for significant sample and power savings. iii Dedication Marriage is a promise, a potential, made in the hearts of two people who love, which takes a lifetime to fulfill.-Edmund O'Neil Dedicated to Erica and the lifetime we will spend fulfilling that promise. First, thank you to my family for all of the love and support over the years. I'm lucky to have such a large family, and even luckier to feel so close with all of them.

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An ultra-low-power analog memory system with an adaptive sampling rate

Cited by 5 publications

References 9 publications

Reconfigurable Analog Preprocessing for Efficient Asynchronous Analog-to-Digital Conversion

Reconfigurable Analog Preprocessing for Efficient Asynchronous Analog-to-Digital Conversion

Low-Power and Programmable Analog Circuitry for Wireless Sensors

Data Conversion Within Energy Constrained Environments

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