An Ultrasound Imaging System With On-Chip Per-Voxel RX Beamfocusing for Real-Time Drone Applications

Wu, Liuhao; Guo, Jiaqi; Jiang, Rucheng; Peng, Yande; Wu, Han; Li, Jiamin; Luo, Yang; Lin, Liwei; Yoo, Jerald

doi:10.1109/jssc.2022.3202502

Cited by 9 publications

(3 citation statements)

References 30 publications

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“…This contrasts to a current source in a neurostimulation application. Similarly, the HV ultrasonic transducer driver presented in [41] delivers a periodic, rail-to-rail voltage swing. Because the output voltage is controlled, the safe gate biases can be predicted and are delivered by periodic, HV clock signals in a feed-forward fashion.…”

Section: B Stimulator Channel Designmentioning

confidence: 99%

Dense, 11 V-Tolerant, Balanced Stimulator IC with Digital Time-Domain Calibration for $< $100 nA Error

Feyerick

Dehaene

2023

IEEE Trans. Biomed. Circuits Syst.

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This work presents a multichannel neurostimulator implementing a novel charge balancing technique to achieve maximal integration. Safe neurostimulation demands accurate charge balancing of the stimulation waveforms to prevent charge build-up on the electrode-tissue interface. We propose digital time-domain calibration (DTDC), which adjusts the second phase of the biphasic stimulation pulses digitally, based on a onetime characterization of all stimulator channels with an on-chip ADC. Accurate control of the stimulation current amplitude is loosened in exchange for time-domain corrections, relieving circuit matching constraints and consequentially saving channel area. A theoretical analysis of DTDC is presented, establishing expressions for the required time resolution and the new, relaxed circuit matching constraints. To validate the DTDC principle, a 16-channel stimulator was implemented in 65 nm CMOS, requiring only 0.0141 mm 2 area/channel. Despite being implemented in a standard CMOS technology, 10.4 V compliance is achieved for compatibility with high-impedance microelectrode arrays typical for high-resolution neural prostheses. To the authors' knowledge, this is the first stimulator in a 65 nm low-voltage process achieving over 10 V output swing. Measurements after calibration show the DC error is successfully reduced below 96 nA on all channels. Static power consumption is 20.3 µW/channel.

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Section: B Stimulator Channel Designmentioning

confidence: 99%

Dense, 11 V-Tolerant, Balanced Stimulator IC with Digital Time-Domain Calibration for $< $100 nA Error

Feyerick

Dehaene

2023

IEEE Trans. Biomed. Circuits Syst.

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show abstract

“…However, it still requires a size of over 1 Mb. On the other hand, Figure 3b shows the delay calculator-based architecture [14][15][16][17]. The output signals from all ADCs are stored in memory.…”

Section: Introductionmentioning

confidence: 99%

A 48-Channel High-Resolution Ultrasound Beamforming System for Ultrasound Endoscopy Applications

Yun,

Lee,

Bae

2024

Electronics

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We introduce a highly efficient 48-channel ultrasound beamforming system ideal for ultrasound endoscopy applications. The system includes a transmitter and a receiver that allows for low-area, high-resolution imaging acquisition. The transmitter uses a charge redistribution HV (high-voltage) scheme to generate three-level pulses that actuate the transducer, implemented with the standard CMOS process for optimal cost and power savings. Meanwhile, the receiver features a sub-array structure and a delay generator that reduces the area usage. To achieve high-resolution ultrasound imaging acquisition with low computational power, we developed a Shift Coherence Factor (SCF) algorithm that is hardware-friendly. This approach delivers a lateral resolution of over 20% better than that of the conventional delay and sum (DAS) algorithm, with a contrast ratio of over 30 dB. The system was implemented in a 180 nm standard CMOS process with an area of 24.98 mm2, power consumption of 8.23 mW per channel, achieving a delay resolution of 8.33 ns, and a low-area implementation of 0.52 mm2 per channel. The system offers high-quality imaging acquisition with minimal additional area and power consumption, which has great potential for 3D imaging or catheterized ultrasound systems.

show abstract

“…However, it still required a size of over 1 Mb. On the other hand, Figure 3 (b) shows the delay calculator-based architecture [14][15][16][17]. The output signals from all the ADCs are stored in a memory.…”

Section: Introductionmentioning

confidence: 99%

A 48-Channel High-Resolution Ultrasound Beamforming System for Ultrasound Endoscopy Applications

Yun,

Lee,

Bae

2023

Preprint

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We are introducing a highly efficient 48-channel ultrasound beamforming system ideal for ultrasound endoscopy applications. The system includes a transmitter and a receiver, which allow for low-area, high-resolution imaging acquisition. The transmitter uses a charge redistribution HV (high voltage) scheme to generate three-level pulses that actuate the transducer, implemented with the standard CMOS process for optimal cost and power savings. Meanwhile, the receiver features a sub-array structure and a delay generator that reduces area usage. To achieve high-resolution ultrasound imaging acquisition with low computational power, we developed the Shift Coherence Factor (SCF) algorithm, which is hardware-friendly. This approach delivers a lateral resolution over 20% better than the conventional delay and sum (DAS) algorithm, with a contrast ratio of over 30 dB. The system was implemented in a 180 nm standard CMOS process with an area of 24.98 mm2, power consumption of 8.23 mW per channel, achieving a delay resolution of 8.33 ns, and a low-area implementation of 0.52 mm2 per channel. The system offers high-quality imaging acquisition with minimal additional area and power consumption, which has great potential for 3D imaging or catheterized ultrasound systems.

show abstract

An Ultrasound Imaging System With On-Chip Per-Voxel RX Beamfocusing for Real-Time Drone Applications

Cited by 9 publications

References 30 publications

Dense, 11 V-Tolerant, Balanced Stimulator IC with Digital Time-Domain Calibration for $< $100 nA Error

Dense, 11 V-Tolerant, Balanced Stimulator IC with Digital Time-Domain Calibration for $< $100 nA Error

A 48-Channel High-Resolution Ultrasound Beamforming System for Ultrasound Endoscopy Applications

A 48-Channel High-Resolution Ultrasound Beamforming System for Ultrasound Endoscopy Applications

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