Abstract:In this paper, a computational analysis is presented for the comparison of wafer level chip scale package‐on‐build‐up PCB assemblies with various solders and microvia configurations. The printed circuit board of the assembly has one build‐up layer on one side. For comparison, the board with two build‐up layers on the same side is studied as well. Furthermore, two solder joint materials, namely, 62Sn–2Ag–36Pb and 96.5Sn–3.5Ag are studied for comparison. The assembly is simulated by a finite element model and th… Show more
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