Analysis and design based on small-signal equivalent circuit for a lO-GHz ring VCO with 65-nm CMOS

Abstract

An analysis and design method for a lO-GHz ring voltage-controlled oscillator (VCO) are proposed. By using a detailed small-signal equivalent circuit model, the delay of the current mode logic buffer circuit and the minimum limit of the number of those used in the VCO are evaluated. We set the transconductance generator in a MOSFET model as a function of drain current and obtained the current dependence of the oscillation frequency of the VCO. To confirm the validity of the design method, we compared the measured and estimated oscillation frequency of the VCO fabricated with the 65-nm MOSFET process. The agreement between the measurements and calculations is good enough, confirming the validity of the method.

Design of a Wide-Band Voltage-Controlled Ring Oscillator Implemented in 180 nm CMOS Technology

“…However, the main effects are that decreasing N yields a reduction in gain, which may result in the oscillation eventually stopping. In this manner, this article shows that deriving the symbolic approximation of the dominant pole of the CMOS CML stage, through the use of the high-frequency small-signal equivalent model of the MOS transistor [17], can help to enhance the oscillation frequency.…”