Analysis and implementation of fractional-order chaotic system with standard components

Abstract

Graphical abstract

Chaotic Oscillations in Cascoded and Darlington-Type Amplifier Having Generalized Transistors

“…The main problem with the design of the FO chaotic oscillator lies in the synthesis of the broad-band FO capacitor itself. Unlike some others, the authors of [37] have properly recognized the necessity to approximate the constant phase shift of the FO capacitor over several frequency decades. To speed up the construction of the FO chaotic oscillator, paper [38] offers fully passive ladder realizations of FO capacitors for all decimal orders between zero and one and all multiples of ten degrees; including 1 4 and 3 4 .…”

CMOS OTA-Based Filters for Designing Fractional-Order Chaotic Oscillators

“…From ( 5), one can observe that the design requires amplifiers, adders, and subtractors, and the SNLF is manipulated to generate multi-scroll attractors. For example, a two-scroll attractor can be implemented by modeling the SNLF by (6), where m is the slope of the linear segment in the ranges −bp ≤ x ≤ bp, with bp as a break-point, and the saturation level is given by k. It is simulated by setting a = b = c = d 1 = 0.7, m = k/bp = 0.5/0.1 for f (x), and initial conditions x 0 = y 0 = z 0 = 0.1. Figure 2 shows the portraits of FOCO 2 , which are obtained by plotting the state variables among them to appreciate the chaotic attractor.…”

“…This SNLF can be designed by the CMOS topology shown in Figure 14, which was proposed in [36]. This CMOS circuit presents advantages, such as programmability of the slope m, saturation level k, and break-points bp required in (6). The sizes of the MOS transistors are W = 1.35 µm for M 1 , M 2 , M 3 , W = 6.3 µm for M 4 , and all the lengths are set to L = 0.18 µm.…”

“…Those algorithms were implemented using embedded systems, such as field-programmable gate arrays (FPGAs), but compared to analog solutions, they require huge hardware resources. For example, field-programmable analog arrays (FPAAs) and amplifiers were used to design FOCOs in [3,6], and fractional-order circuits were also implemented by a constant phase element, as shown in [7]. The authors in [8] showed cryptographic applications of a FOCO with high-effective analog computation, using amplifiers and two anti-parallel semiconductor diodes to provide a hyperbolic sine nonlinearity.…”

Ritmik desen üreteçleri için Rayleigh osilatörünün fraksiyonel versiyonu ve devre sentezi

“…Fraksiyonel dereceli sistemlerin çözümlerinde kullanılan nümerik analiz yöntemleri sistem yanıtlarının gözlemlenmesinde etkin bir şekilde kullanılmasına rağmen; bu yöntemlerin sistem analizlerinde geçmiş durum bilgilerine ihtiyaç duymaları nedeniyle elektronik donanım uygulamalarına aktarılması oldukça güçtür. İlgili yöntemlerin donanım gerçekleştirimleri için her ne kadar farklı çözümler önerilse de [12,13]; fraksiyonel dereceden tanımlı sistemlerin elektronik donanımlarla gerçekleştirimleri için önerilen farklı yaklaşımlar, devre kurulum karmaşasının önüne geçme ve düşük donanım maliyeti sağlama gibi avantajları ile daha sık tercih edilmektedir [14,15]…”