Analysis of <i>n</i>+<i>p</i> silicon junctions with varying substrate doping concentrations made under ultraclean processing technology

Aharoni, H.; Ohmi, Tadahiro; Oka, Mauricio Massazumi; Nakada, Akira; Tamai, Yukio

doi:10.1063/1.364442

Cited by 28 publications

(15 citation statements)

References 26 publications

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“…In addition, similar values for ͉E T ϪE i ͉ have been obtained in the past for diodes in p-type Cz silicon substrates. 1 This procedure has also been applied for diodes on epitaxial ͑epi͒ wafers as shown in Table I. It can be noticed from the last two columns that in both cases the accuracy is within 20%.…”

Section: ͑6͒mentioning

confidence: 98%

Improved extraction of the activation energy of the leakage current in silicon p–n junction diodes

Poyai

Simoen

Claeys

et al. 2001

Applied Physics Letters

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An accurate method is proposed for the extraction of the activation energy ET from the volume generation current density JgA in silicon p–n junctions. It combines temperature-dependent current–voltage (I–V) and capacitance–voltage measurements on an array of diodes with different geometry, in order to separate the peripheral from the volume components. The JgA can be found from the volume leakage current by subtraction of the volume diffusion current JdA, which is calculated from the forward I–V characteristic. To derive the correct slope from an Arrhenius plot of the JgA, several additional corrections have been applied. One is the temperature dependence of the depletion width, which is derived from the corrected volume capacitance. The most important ET change is shown to come from the temperature dependence of the recombination lifetime.

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Section: ͑6͒mentioning

confidence: 98%

Improved extraction of the activation energy of the leakage current in silicon p–n junction diodes

Poyai

Simoen

Claeys

et al. 2001

Applied Physics Letters

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“…According to [17-20, 26, 58], the junction capacitances can be computed with the following equations:

C_{j θ} = \frac{A_{j θ} C_{j S 0 θ}}{{(1 - \frac{V_{θ}}{V_{b i θ}})}^{M_{j S θ}}} + \frac{P_{j θ} C_{jSW 0 θ}}{{(1 - \frac{V_{θ}}{V_{b i θ}})}^{M_{italicjSW θ}}} = \frac{C_{j 0 θ}}{{(1 - \frac{V_{θ}}{V_{biEFF θ}})}^{M_{j θ}}} \approx \frac{ε_{0} ε_{S i} A_{j θ}}{W_{θ}}

where the newly introduced parameters are: P jθ , the perimeter of the considered junction (θ = 1 for J 1 and 2 for J 2 ); C jS0θ , the zero-bias junction area capacitance; C jSW0θ , the zero-bias sidewall capacitance; C j0θ , the zero-bias effective capacitance; V biθ , the built-in potential; V biEFFθ , the effective built-in potential; M jSθ , M jSWθ and M jθ , dimensionless technological parameters depending on the doping profiles of both PN junctions (with values around 1/2 and 1/3 for the abrupt and the linear junctions respectively); ε 0 ε Si , the silicon permittivity,

V_{1} = V_{well}^{'} - V_{diff}^{'}

and

V_{2} = V_{well}^{'} - V_{sub}^{'}

.…”

Section: Bdj Spice Modelmentioning

confidence: 99%

A Review of the CMOS Buried Double Junction (BDJ) Photodetector and its Applications

Feruglio

Garda

et al. 2008

Sensors

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A CMOS Buried Double Junction PN (BDJ) photodetector consists of two vertically-stacked photodiodes. It can be operated as a photodiode with improved performance and wavelength-sensitive response. This paper presents a review of this device and its applications. The CMOS implementation and operating principle are firstly described. This includes the description of several key aspects directly related to the device performances, such as surface reflection, photon absorption and electron-hole pair generation, photocurrent and dark current generation, etc. SPICE modelling of the detector is then presented. Next, design and process considerations are proposed in order to improve the BDJ performance. Finally, several BDJ-detector-based image sensors provide a survey of their applications.

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“…Note that the capacitance value depends on the depletion layer width. According to [8,9,14], this mechanism can be taken into account by evaluating the junction capacitance as follows:…”

Section: Large-signal Modelmentioning

confidence: 99%

Modelling of the CMOS buried double-junction photodetector

Hanna¹,

Alquié²,

Vasilescu³

2005

Microw. Opt. Technol. Lett.

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fixed as ⌬t ϭ 0.5⌬z/c. Then the 2 nd -order Liao's T2 ABC is applied in the lower boundary where the material is air and the 2 nd -order Liao's T3 ABC is applied in the upper boundary where the material is glass, with a refractive index of 1.5.The stability criterion for the hybrid algorithm is given by Eq. (7), but Liao's ABC requires ⌬t ϭ 0.5⌬z/c. In general, if we assume ⌬x ϭ ⌬y, then we can obtain the following stability criterion for using Liao's ABC: ⌬x ϭ ⌬y Ն ⌬z ͱ6 Ϸ 1.283⌬z.This is generally satisfied since, in the x and y directions, a lower sampling rate is usually used to take the advantage of the PSTD algorithm.Because we use Fourier PSTD with a uniform grid in the x and y directions, the hybrid algorithm in this paper requires that the material contrast in the x and y directions is not too large. Otherwise, the severe Gibbs phenomenon will contaminate the simulation results. In our numerical experiments, we found that when skin depth of the absorbing layer is very small, in which the case Gibbs phenomenon is sure to appear, there are fairly large differences in the field values obtained via the hybrid method and those obtained via FDTD with smaller grid size (see Fig. 7). Here we propose several possible remedies for high-contrast materials and good conductors, if they are included in the computation domain: (i) If the object geometry is rectangular on the mask surface, we can use the mapped PSTD along the x and y directions to help reduce the magnitude of the Gibbs phenomenon in the mapped space [12,14]; (ii) if the object geometry is not rectangular but can be handled with multidomain PSTD, we suggest using multidomain PSTD in the x and y directions; (iii) use regular Fourier PSTD for the x and y directions and then apply a low-pass filter to the final steady-state results contaminated by the Gibbs phenomenon. This may help restore the global exponential convergence property of the PSTD algorithm. We expect to see more progress in these areas in the near future. CONCLUSIONIn this paper, we have applied a hybrid PSTD-FDTD algorithm for electrically large thin-plate problems. We adopted FDTD along the vertical direction of the thin plate and PSTD along the horizontal directions. This arrangement can combine the advantages of both the FDTD and PSTD algorithms. As an example application, we studied the near-field scattering of a photo mask, and the hybrid algorithm was shown to offer large savings in memory usage and computation time, as compared with the FDTD method.

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Analysis of n+p silicon junctions with varying substrate doping concentrations made under ultraclean processing technology

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Cited by 28 publications

References 26 publications

Improved extraction of the activation energy of the leakage current in silicon p–n junction diodes

Improved extraction of the activation energy of the leakage current in silicon p–n junction diodes

A Review of the CMOS Buried Double Junction (BDJ) Photodetector and its Applications

Modelling of the CMOS buried double-junction photodetector

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