Analysis of negative capacitance and self-heating in organic semiconductor devices

Knapp, Evelyne; Ruhstaller, Beat

doi:10.1063/1.4916981

Cited by 43 publications

(19 citation statements)

References 24 publications

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“…In the C-V plot the negative capacitance increases with lower frequency. Similar experiments are conducted in references 6,7 where with the aid of admittance spectroscopy negative capacitance values were found in uni-and bipolar devices. Such findings were previously assigned to interfacial effects, 8, 9 recombination 10, 11 or trap states.…”

Section: Introductionsupporting

confidence: 68%

Analysis of self-heating and trapping in organic semiconductor devices

Knapp

Ruhstaller

2015

SPIE Proceedings

Self Cite

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So far self-heating has only been of concern in large-area devices where the resistive transparent anode leads to a potential drop over the device resulting in inhomogeneous current, brightness and temperature distributions. In this work, we show that even small lab devices suffer from self-heating effects originating from the organic semiconductor layer. In admittance spectroscopy of organic semiconductor devices, negative capacitance values often arise at low frequency and high voltages. In this study we demonstrate the influence of self-heating on organic semiconductor devices with the aid of a numerical 1D drift-diffusion model that is extended by Joule heating and heat conduction. Furthermore the impact of trap states on the capacitance in combination with self-heating is demonstrated. The typical signature of self-heating might be overshadowed depending on the trapping dynamics. In a next step, we compare the negative capacitance vs. frequency for uni-and bipolar devices to quantify the different processes. We emphasize the impact of self-heating and trapping on OLEDs and organic solar cells. To ease the interpretation of the results we investigate simulations in the time domain as well as in the frequency domain. We have provided clear evidence of self-heating of organic semiconductor devices and conclude that a comprehensive model requires the inclusion of heat conduction and heat generation in the drift-diffusion model.

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Section: Introductionsupporting

confidence: 68%

Analysis of self-heating and trapping in organic semiconductor devices

Knapp

Ruhstaller

2015

SPIE Proceedings

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“…A rearrangement of the permanent dipole moments leading to an effective decrease of the sheet charge density has however been found to take place during degradation [3]. In order to take into account the internal barriers between the two organic materials, the continuity of the quasi fermi levels of both holes and electrons is postulated in the simulations [6,11], moreover the alignment of the Fermi levels at the metal/organic interfaces is assumed as a boundary condition.…”

Section: Modelling Of Polar Materials By Drift-diffusion Simulationsmentioning

confidence: 99%

Simulation of OLEDs with a polar electron transport layer

Altazin

Züfle

Knapp

et al. 2016

Organic Electronics

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Organic light-emitting diodes (OLEDs) rely on the use of functional materials with suitable energy levels and mobilities for selective charge carrier injection and transport of one species only at the respective electrode. Until recently, however, the dipolar nature of many organic semiconductors has been largely ignored in this context. In particular, electron transports layers (ETLs) often exhibit spontaneous orientation polarization leading to interfacial charges that modify the electrical potential landscape inside a hetero-layer device. Here we demonstrate that the effect of polar ETLs can be simulated using the well-established Poisson and drift-diffusion formalism, if these interfacial charges are taken into account. Impedance spectroscopy is used in order to validate our approach and to characterize the polarity of the material. Finally, simulations allow to quantify the impact of polar ETLs on device performance.

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“…In most cases, the phenomenon has been observed in the presence of traps for a wide range of materials such as silicon [20], [21], III-V semiconductors [13], [16], [18], [22], [23] and organic semiconductors [14], [15], [24]. Since Salahuddin [7] proposed the application of NC for steep SS FETs, ferroelectric materials have been subject of a number of reports showing their NC properties [25]- [27].…”

Section: Introductionmentioning

confidence: 99%

Charge Trapping Mechanism Leading to Sub-60-mV/decade-Swing FETs

Daus

Vogt

Münzenrieder

et al. 2017

IEEE Trans. Electron Devices

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(2017) Charge trapping mechanism leading to sub-60-mV/decade-Swing FETs. IEEE Transactions on Electron Devices, 64 (7). pp. 2789 -2796 This version is available from Sussex Research Online: http://sro.sussex.ac.uk/68771/ This document is made available in accordance with publisher policies and may differ from the published version or from the version of record. If you wish to cite this item you are advised to consult the publisher's version. Please see the URL above for details on accessing the published version. Copyright and reuse:Sussex Research Online is a digital repository of the research output of the University.Copyright and all moral rights to the version of the paper presented here belong to the individual author(s) and/or other copyright owners. To the extent reasonable and practicable, the material made available in SRO has been checked for eligibility before being made available.Copies of full text items generally can be reproduced, displayed or performed and given to third parties in any format or medium for personal research or study, educational, or not-for-profit purposes without prior permission or charge, provided that the authors, title and full bibliographic details are credited, a hyperlink and/or URL is given for the original metadata page and the content is not changed in any way. Abstract-In this work, we present a novel method to reduce the subthreshold swing of field-effect transistors below 60 mV/dec. Through modeling, we directly relate trap charge movement between the gate electrode and the gate dielectric to subthreshold swing reduction. We experimentally investigate the impact of charge exchange between a Cu gate electrode and a 5 nm thick amorphous Al2O3 gate dielectric in an InGaZnO4 thin-film transistor. Positive trap charges are generated inside the gate dielectric while the semiconductor is in accumulation. During the subsequent de-trapping, the subthreshold swing diminishes to a minimum value of 46 mV/dec at room temperature. Furthermore, we relate the charge trapping/de-trapping effects to a negative capacitance behavior of the Cu/Al2O3 metal-insulator structure. IEEE TRANSACTIONS ON ELECTRON DEVICES

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Analysis of negative capacitance and self-heating in organic semiconductor devices

Cited by 43 publications

References 24 publications

Analysis of self-heating and trapping in organic semiconductor devices

Analysis of self-heating and trapping in organic semiconductor devices

Simulation of OLEDs with a polar electron transport layer

Charge Trapping Mechanism Leading to Sub-60-mV/decade-Swing FETs

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