Application Mapping Onto Mesh-Based Network-on-Chip Using Discrete Particle Swarm Optimization

Sahu, Pradip Kumar; Shah, Tapan; Manna, Kanchan; Chattopadhyay, Santanu

doi:10.1109/tvlsi.2013.2240708

Cited by 113 publications

(65 citation statements)

References 28 publications

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“…This algorithm regulated the crossover and mutation ratein each iteration based on the best fitness and the average fitness, thus best-fit mapping could be gained much quicker. In literature [7], particle swarm optimization algorithm mapping was used.The population initialization module initializedthe position of particles; the optimal particle update module updatedwhen the new personal best particle and particle position limits changed; non-inferior solution set update module selected optimum solution based on the communication relationship of new particles; iterationcontinuedtill the approximate optimal solution mapping is obtained.…”

Section: Related Workmentioning

confidence: 99%

Modified Genetic Algorithm Based Method on Low-Power Mapping in Network-on-chip

Dai¹,

Liu²,

Shen³

et al. 2015

Advances in Engineering Research

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Focusing on the power decreasing of large-scale applications in network-on-chip, this paper proposed amodified genetic algorithm based method on low-power mapping. With communication weights of task nodes and structural features of mapping platform, this method acquired better initial mapping solution set with the consideration of task node priority and its connection. Moreover, we introduced the roulette wheel selection, best-neighbor selection and reverse evolution, and selected the initial solution with a certain probability at each iteration to prevent the algorithm stagnation.Experimental results show that, when maintaining the same task model and mapping platform, compared with the genetic algorithm and random mapping algorithm, our proposed algorithm greatly decreases the energy consumption.

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Section: Related Workmentioning

confidence: 99%

Modified Genetic Algorithm Based Method on Low-Power Mapping in Network-on-chip

Dai¹,

Liu²,

Shen³

et al. 2015

Advances in Engineering Research

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“…Optimization search with refinement such as simulated annealing (SA) [3,4], genetic algorithm (GA) [5,6], and particle swarm optimization (PSO) [7] has been used in application mapping in NoC. GA is the predominant algorithm for application mapping.…”

Section: Applied Computational Intelligence and Soft Computingmentioning

confidence: 99%

“…Simulated annealing (SA) [3,4,14] and GA [5] were also proposed as the application mapping techniques to optimize energy consumption using bit energy model. In [1,7,13,[15][16][17], the application mapping optimization is based on communication cost in terms of the distance among communicating cores. These application mapping techniques only consider energy minimization.…”

Section: Related Workmentioning

confidence: 99%

“…However, author in [5] has shown that an evolutionary algorithm performs better than OSA. Particle swarm optimization (PSO) has been proposed with deterministic initial mapping to explore the search space [7]. The domain knowledge applied on initial mapping is greedily based where IP cores are placed on the NoC topology based on the descending ranking of total communication cost in application graph.…”

Section: Related Workmentioning

confidence: 99%

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Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip

Tei

Hau

Shaikh-Husin

et al. 2014

Applied Computational Intelligence and Soft Computing

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This paper proposes a multiobjective application mapping technique targeted for large-scale network-on-chip (NoC). As the number of intellectual property (IP) cores in multiprocessor system-on-chip (MPSoC) increases, NoC application mapping to find optimum core-to-topology mapping becomes more challenging. Besides, the conflicting cost and performance trade-off makes multiobjective application mapping techniques even more complex. This paper proposes an application mapping technique that incorporates domain knowledge into genetic algorithm (GA). The initial population of GA is initialized with network partitioning (NP) while the crossover operator is guided with knowledge on communication demands. NP reduces the large-scale application mapping complexity and provides GA with a potential mapping search space. The proposed genetic operator is compared with stateof-the-art genetic operators in terms of solution quality. In this work, multiobjective optimization of energy and thermal-balance is considered. Through simulation, knowledge-based initial mapping shows significant improvement in Pareto front compared to random initial mapping that is widely used. The proposed knowledge-based crossover also shows better Pareto front compared to state-of-the-art knowledge-based crossover.

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“…PSMAP, a meta-heuristic strategy using PSO technique has been proposed in [34] to reduce both static and dynamic cost of NoC for mesh based application mapping. A discrete multiple PSO based mapping technique has been proposed [35] to optimize the performances using deterministic initial solutions. In [36], an Ant Colony Optimization (ACO) based algorithm has been proposed for application mapping onto NoC to minimize the bandwidth requirement.…”

mentioning

confidence: 99%

Application Mapping onto Butterfly-Fat-Tree based Network-on-Chip using Discrete Particle Swarm Optimization

Sahu¹,

Manna²,

Chattopadhyay³

2015

IJCA

Self Cite

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This paper addresses the problem of application mapping onto Butterfly-Fat-Tree (BFT) based Network-on-Chip design. It proposes a new mapping technique based on discrete Particle Swarm Optimization (PSO) to map the cores of the core graph to the routers. The basic PSO has been augmented by running multiple PSO and deterministically generating a part of the initial population for PSO. The mapping results have been compared with well-known techniques reported in the literature for a number of benchmark applications. The reported strategy produces results superior to those obtained via existing approaches within a reasonable CPU time. KeywordsApplication mapping, Network-on-Chip, System-on-Chip, Butterfly-Fat-Tree, Discrete Particle Swarm Optimization INTRODUCTIONNetwork-on-Chip (NoC) has evolved as a viable strategy to implement Intellectual Property (IP) core based System-onChip (SoC) designs. It solves the traditional problems of bandwidth limitations of bus-based SoC design by providing an on-chip network fabric consisting of routers connected in a certain topology. Conventional data signal exchanges are replaced by message passing between the cores through the router fabric [1]- [4]. A major challenge in NoC based system design is to associate the IP cores implementing tasks of an application with routers. This is commonly known as the process of application mapping. This has got a very significant role to play in performance of the overall system as it directly influences the communication time, the required link bandwidth, the admissible delay of the router, and energy consumption of the whole NoC [5], [6]. Furthermore, these requirements vary from one application domain to another. For example, while multimedia applications require high bandwidth, real time systems require guaranteed delay, and portable devices require low power consumption. Most of the application mapping algorithms reported in the literature assumes a mesh-connected router fabric for the NoC. In [6]- [10], authors have proposed many topologies for NoC. Butterfly-Fat-Tree (BFT) enjoys several advantages over other topologies [7], [10]. The BFT topology can be easily implemented inside chips. It has the advantage of having small diameter as well as symmetric structure. There are various versions of the networks connected in the tree like architecture and most of them have recursive structures. The wire routing is also simpler. In chip design, for same number of cores, the area occupied by BFT is less than the mesh topology. These characteristics make BFT a popular scheme for interconnecting IPs [7], [10]. In [7] stage. This ensures faster convergence and improved quality of solution for the successive stages.3. For any stage of PSO, the initial population generation is not fully random. A good number of particles have been created using a heuristic. This has enabled our PSO to explore the promising regions of search space much better.4. The communication cost metric values of the mapping solutions of our approach have been compared ...

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Application Mapping Onto Mesh-Based Network-on-Chip Using Discrete Particle Swarm Optimization

Cited by 113 publications

References 28 publications

Modified Genetic Algorithm Based Method on Low-Power Mapping in Network-on-chip

Modified Genetic Algorithm Based Method on Low-Power Mapping in Network-on-chip

Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip

Application Mapping onto Butterfly-Fat-Tree based Network-on-Chip using Discrete Particle Swarm Optimization

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