Application of electron channeling contrast imaging to 3D semiconductor structures through proper detector configurations

Han, Han; Hantschel, Thomas; Strakos, Libor; Vystavel, T.; Baryshnikova, Marina; Mols, Yves; Kunert, Bernardette; Langer, Róbert; Vandervorst, Wilfried; Caymax, Matty

doi:10.1016/j.ultramic.2019.112928

Cited by 7 publications

(7 citation statements)

References 18 publications

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“…1b shows a close-up view of the area defined by the blue rectangle. At another location, a pile-up of a dozen of TDs along the [1][2][3][4][5][6][7][8][9][10] direction is observed and marked by a green rectangle. Some specific dislocations from the long pile-up in green rectangle are magnified in Fig.…”

Section: Ecci Sensitivity Of Defect Detectionmentioning

confidence: 99%

“…For the reference ECCI micrograph covering 16.7 μm 2 , it has a field of view of 5 μm, a height-to-length ratio of 2:3, a 1536 pixels x 1024 pixels resolution, a line integration of 10 and a dwell time of 5 μs at 20 kV and 0.8 nA as previously applied in Ref. [7,9]. The acquisition takes ~79 s per image.…”

Section: Optimization Of Ecci Mappingmentioning

confidence: 99%

“…The possibility of using an automated ECCI mapping on patterned substrates was explored using a sample with an array of selectively grown GaAs nano-ridges. Due to the 3D structure of such a sample, a low beam energy of 5 keV should be applied during the ECCI measurement, as reported by the reference [9]. For the ECCI mapping shown in Fig.…”

Section: Application To Patterned Iii-v Nano-ridgesmentioning

confidence: 99%

“…Automated ECCI mapping refers to the program-controlled acquisition of an array of ECCI micrographs over a defined area at a given location [4]. Moreover, the technique has been applied to the versatile analysis of individual defects on both blanket [5][6][7] and patterned structures [8,9]. However, systematic optimizations of different imaging parameters have not been proposed yet.…”

Section: Introductionmentioning

confidence: 99%

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Application and Optimization of Automated ECCI Mapping to the Analysis of Lowly Defective Epitaxial Films on Blanket or Patterned Wafers

Han

Hantschel

Lagrain

et al. 2021

International Symposium for Testing and Failure Analysis

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The physical limits of CMOS scaling, as predicted by Moore's Law, should have already been reached several years ago. However, the scaling of transistors is still ongoing due to continuous improvements in material quality enabling the fabrication of complex device structures with nm-size dimensions. More than ever, the structural properties and the eventual presence of crystalline defects in the various semiconductor materials (SiGe, III/V) play a critical role. Electron channeling contrast imaging (ECCI) is a powerful defect analysis technique developed in recent years. The technique allows for fast and non-destructive characterizations with the potential for extremely low detection limits. The analysis of lowly defective materials requires measurements over large areas to obtain statistically relevant data. Automated ECCI mapping routines enable the quantification of crystalline defect densities as low as ~1e5 cm-2, e.g., Si0.75Ge0.25 strain relaxed buffers (SRB) epitaxially grown on a Si substrate. Methods to reduce the total measurement time without compromising its sensitivity will be discussed. The measurement routine has also been optimized to detect extended crystalline defects in III/V layers, selectively grown on shallow trench isolation patterned Si wafers. Throughout these examples, this study demonstrates the great potential of ECCI as a versatile and industry-relevant technique for defect analysis.

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Section: Ecci Sensitivity Of Defect Detectionmentioning

confidence: 99%

Section: Optimization Of Ecci Mappingmentioning

confidence: 99%

Section: Application To Patterned Iii-v Nano-ridgesmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Application and Optimization of Automated ECCI Mapping to the Analysis of Lowly Defective Epitaxial Films on Blanket or Patterned Wafers

Han

Hantschel

Lagrain

et al. 2021

International Symposium for Testing and Failure Analysis

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“…It is a scanning electron microscopy (SEM) based technique, which uses the strong dependency of the backscattered electron intensity on the local crystal properties (lattice plane orientation, presence of strain fields, etc.). The inspection method is non-destructive and visualizes individual defects on a smooth sample surface including a 3-dimensional structure like a NR [12,45,46]. Planar defects can be identified as a contrast line, whereas a threading dislocation, which is a 1-dimensional line defect, gives a dot-like contrast feature in the ECCI image.…”

Section: Of 19mentioning

confidence: 99%

Nano-Ridge Engineering of GaSb for the Integration of InAs/GaSb Heterostructures on 300 mm (001) Si

Baryshnikova

Mols

Ishii³

et al. 2020

Crystals

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Nano-ridge engineering (NRE) is a novel heteroepitaxial approach for the monolithic integration of lattice-mismatched III-V devices on Si substrates. It has been successfully applied to GaAs for the realization of nano-ridge (NR) laser diodes and heterojunction bipolar transistors on 300 mm Si wafers. In this report we extend NRE to GaSb for the integration of narrow bandgap heterostructures on Si. GaSb is deposited by selective area growth in narrow oxide trenches fabricated on 300 mm Si substrates to reduce the defect density by aspect ratio trapping. The GaSb growth is continued and the NR shape on top of the oxide pattern is manipulated via NRE to achieve a broad (001) NR surface. The impact of different seed layers (GaAs and InAs) on the threading dislocation and planar defect densities in the GaSb NRs is investigated as a function of trench width by using transmission electron microscopy (TEM) as well as electron channeling contrast imaging (ECCI), which provides significantly better defect statistics in comparison to TEM only. An InAs/GaSb multi-layer heterostructure is added on top of an optimized NR structure. The high crystal quality and low defect density emphasize the potential of this monolithic integration approach for infrared optoelectronic devices on 300 mm Si substrates.

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Crystalline defect analysis in epitaxial Si0.7Ge0.3 layer using site-specific ECCI-STEM

Han

Strakos

Hantschel

et al. 2021

Micron

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Application of electron channeling contrast imaging to 3D semiconductor structures through proper detector configurations

Cited by 7 publications

References 18 publications

Application and Optimization of Automated ECCI Mapping to the Analysis of Lowly Defective Epitaxial Films on Blanket or Patterned Wafers

Application and Optimization of Automated ECCI Mapping to the Analysis of Lowly Defective Epitaxial Films on Blanket or Patterned Wafers

Nano-Ridge Engineering of GaSb for the Integration of InAs/GaSb Heterostructures on 300 mm (001) Si

Crystalline defect analysis in epitaxial Si0.7Ge0.3 layer using site-specific ECCI-STEM

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