Application of FPGA technology to accelerate the finite-difference time-domain (FDTD) method

Abstract

The continuing advances in the field of electrical engineering, in areas like cellular communications, fiber optics, mobile and multigigahertz electronics have necessitated a computer-assisted design approach to the complex electromagnetic interactions and problems that arise. Finite-Difference Time-Domain (FDTD) Analysis is a very powerful tool for the modeling of electromagnetic phenomena. The algorithm is computationally intensive and simulations can run for a few hours to several days. Increasing the computation speed and decreasing the run times of this algorithm would bring greater productivity and new avenues of research to many facets of electrical engineering.The algorithm is transferred to custom FPGA-based hardware using a pipelined bit-serial arithmetic architecture. A onedimensional resonator is used to verify the implementation and explore the hardware speed and costs. The computational speed is extremely fast and is not related to the number of computational cells in the simulation. Finally, a discussion of future research is presented.

A Special Purpose Co-Processor Prototype for Virtual Surgery Simulators

“…A variety of previous implementations is related to this project spanning software solutions on general purpose processor all the way to ASIC designs [2]- [3]- [4]- [5]- [6]. Bishop and Kelliher worked on a specialized hardware to accelerate physical modeling for mass-spring models [3]- [4].…”

“…Although there has been some relevant work in this area, all the previous work is limited to 2D operations and fixed organ connectivity [2]- [3]- [4]- [5]- [6]. The organ is modeled into particles that are uniformly mapped into hardware so that a particle is connected in a fixed pattern to n neighbors.…”

Performance Evaluation of Finite-Difference Time-Domain (FDTD) Computation Accelerated by FPGA-based Custom Computing Machine

“…Related work is as follows. The first FPGA-based implementation of the FDTD method is presented in Schneider et al (2002). They proposed a pipelined bit-serial cell performing integer arithmetic computations of the computational kernels of the FDTD method.…”

A prototype FPGA finite-difference time-domain engine for electromagnetics simulation

“…FDTD was first used in an FPGA by researchers using bitserial arithmetic to improve computation speeds in a onedimensional calculation [2]. However, they did not have enough space to run the full design on one chip.…”