For scientific numerical simulation that requires a relatively high ratio of data access to computation, the scalability of memory bandwidth is the key to performance improvement, and therefore custom-computing machines (CCMs) are one of the promising approaches to provide bandwidth-aware structures tailored for individual applications. In this article, we propose a scalable FPGA-array with bandwidth-reduction mechanism (BRM) to implement high-performance and power-efficient CCMs for scientific simulations based on finite difference methods. With the FPGA-array, we construct a systolic computational-memory array (SCMA), which is given a minimum of programmability to provide flexibility and high productivity for various computing kernels and boundary computations. Since the systolic computational-memory architecture of SCMA provides scalability of both memory bandwidth and arithmetic performance according to the array size, we introduce a homogeneously partitioning approach to the SCMA so that it is extensible over a 1D or 2D array of FPGAs connected with a mesh network. To satisfy the bandwidth requirement of inter-FPGA communication, we propose BRM based on time-division multiplexing. BRM decreases the required number of communication channels between the adjacent FPGAs at the cost of delay cycles. We formulate the trade-off between bandwidth and delay of inter-FPGA data-transfer with BRM. To demonstrate feasibility and evaluate performance quantitatively, we design and implement the SCMA of 192 processing elements over two ALTERA Stratix II FPGAs. The implemented SCMA running at 106MHz has the peak performance of 40.7 GFlops in single precision. We demonstrate that the SCMA achieves the sustained performances of 32.8 to 35.7 GFlops for three benchmark computations with high utilization of computing units. The SCMA has complete scalability to the increasing number of FPGAs due to the highly localized computation and communication. In addition, we also demonstrate that the FPGA-based SCMA is power-efficient: it consumes 69% to 87% power and requires only 2.8% to 7.0% energy of those for the same computations performed by a 3.4-GHz Pentium4 processor. With software simulation, we show that BRM works effectively for benchmark computations, and therefore commercially available low-end FPGAs with relatively narrow I/O bandwidth can be utilized to construct a scalable FPGA-array.

Transdifferentiation of Schwann cells is essential for functional peripheral nerve regeneration after injury. By activating a repair program, Schwann cells promote functional axonal regeneration and remyelination. However, chronic denervation, aging, metabolic diseases, or chronic inflammatory processes reduce the transdifferentiation capacity and thus diminish peripheral nerve repair. It was recently described that the sphingosine-1-phosphate receptor (S1PR) agonist Fingolimod enhances the Schwann cell repair phenotype by activation of dedifferentiation markers and concomitant release of trophic factors resulting in enhanced neurite growth. Since Fingolimod targets four out of five S1PRs (S1P1, S1P3-5) possibly leading to non-specific adverse effects, identification of the main receptor(s) responsible for the observed phenotypic changes is mandatory for future specific treatment approaches. Our experiments revealed that S1P3 dominates and that along with S1P1 acts as the responsible receptor for Schwann cell transdifferentiation as revealed by the combinatory application of specific agonists and antagonists. Targeting both receptors reduced the expression of myelin-associated genes, increased PDGF-BB representing enhanced trophic factor expression likely to result from c-Jun induction. Furthermore, we demonstrated that S1P4 and S1P5 play only a minor role in the adaptation of the repair phenotype. In conclusion, modulation of S1P1 and S1P3 could be effective to enhance the Schwann cell repair phenotype and thus stimulate proper nerve repair.

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