Application of Improved Simulated Annealing Optimization Algorithms in Hardware/Software Partitioning of the Reconfigurable System-on-Chip

Jing, Yiming; Kuang, Jishun; Du, Jiayi; Hu, Bi Ying

doi:10.1007/978-3-642-53962-6_48

Cited by 16 publications

(11 citation statements)

References 6 publications

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“…• For our experiments, we choose three different area constrains, which is respectively C a = A/3, C a = A/2, C a = 3A/4. We compare the completing time of tasks in the critical path comparison among the Greedy Algorithm derived from Grode's Algorithm [30], Simulated Annealing algorithm (SA) derived from Eles's Algorithm [31], combined algorithm with Greedy and Simulated Annealing algorithm (GSA) derived from Jing's Algorithm [32], and SFLA algorithm. The value of time cost are shown in Figure 3, Figure 4, and Figure 5, respectively.…”

Section: Methodsmentioning

confidence: 99%

Shuffled Frog Leaping Algorithm for Hardware/Software Partitioning

Du¹,

Kong²,

Zuo³

et al. 2014

JCP

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Reconfigurable system on chip is well known for its flexibility for high performance embedded systems. The hardware/software (HW/SW) partitioning is the most important phase during the design of reconfigurable system on chip. A great many different algorithms have been adopted for solving the hardware/software partitioning problem. Shuffled Frog Leaping Algorithm (SFLA) is popular for its simple concepts, little parameter adjustment, high calculation speed, strong global search optimization capability and easy execution. In this paper, we apply the SFLA algorithm to solving hardware/software partitioning problem on reconfigurable system on chip with coarsegrained. The experimental results show that the SFLA algorithm can reduce the time cost by 45.54% on average with three different area constrain, compared with greedy algorithm. The time cost of SFLA algorithm are also reduced by 23.57% and 9.99% on average with simulated annealing algorithm (SA) and combined algorithm with greedy and simulated annealing algorithm (GSA). When area constrain is a half of area cost which all tasks are implemented by hardware will be taken, SFLA algorithm can reduce the time cost by 51.30%, 21.04% and 11.61% on average, compared with that of Greedy algorithm, SA, and GSA, respectively.

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Section: Methodsmentioning

confidence: 99%

Shuffled Frog Leaping Algorithm for Hardware/Software Partitioning

Du¹,

Kong²,

Zuo³

et al. 2014

JCP

Self Cite

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“…In [34], the comparison of TS, SA and GA algorithms proves the advantages of TS. There are also many hybridizations of heuristic algorithms, such as the greedy simulated annealing (GSA) algorithm combining the greedy and SA algorithms [35], the modified GA algorithm with an efficient crossover operator [36] and the re-excited particle swarm optimization (PSO) algorithm [37], [38] proposed an efficient heuristic algorithm refined by the TS algorithm based on the multiple-choice knapsack problem (MCKP). These hybrid algorithms all have good performance and are mostly used to optimize performance and reserve an extended area to determine the global optimal solution as much as possible.…”

Section: Introductionmentioning

confidence: 99%

A Memory-Reinforced Tabu Search Algorithm With Critical Path Awareness for HW/SW Partitioning on Reconfigurable MPSoCs

Guo¹,

Zhang²,

Zhao³

2019

IEEE Access

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Hardware/software (HW/SW) partitioning and scheduling are the crucial steps in HW/SW co-design. They have a strong effect on performance, area, power and the system itself. In this paper, a memory-reinforced tabu search algorithm with critical path awareness (MTSP) is proposed for solving the HW/SW partitioning problem. First, the critical path (CP) algorithm can locate the critical task queues and output a reduced task graph. Second, the solution to a heuristic algorithm (HA) is used as the initial solution. Third, by introducing hash technology, adding dual memory tables improves the search strength and effectiveness of the tabu search, and the experiment is completed by priority scheduling. MTSP especially has good performance in large task graphs, while it can greatly improve system performance, especially in the case of generating a large communication penalty. The experimental results show that the average improvement over the latest efficient hybrid algorithm is up to 5%. The improvement in algorithm searching time is 66% in comparison to the popular algorithms cited in this paper. INDEX TERMS Hardware/software partitioning, task graph, heuristic method, tabu search algorithm, MPSoC.

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“…This procedure, in addition to not complying with any methodology, does not ensure an optimal result, since for obtaining the best configuration it is necessary to solve an optimization problem which in most of its formulations is NPhard [1]. In most cases, the HW/SW problem Scheduling is the process of determining a starting time for each software/hardware task of the system.…”

Section: Introductionmentioning

confidence: 99%

Collective Behavior Bees for Solving HW/SW Partitioning and Scheduling Problems in RSoC

Yahyaoui

Mohammed

2017

TMLAI

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In the codesign domain, many hardware and software techniques must be developed to satisfy specific constraints in terms of computation time, area, performance, power consumption, etc. This paper introduces an automatic approach To perform HW/SW partitioning and scheduling such that the global application execution time is minimized and the majority area of FPGA ( Field programmable gate array) used in RSoC ( Reconfigurable System on Chip) is exploited. The used algorithm is inspired by the collective behavior of social insects such as bees. : Honey Bees Mating Optimization (HBMO). Comparing the proposed method with Genetic algorithm, the simulation results show that the proposed algorithm has better convergence performance.

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Application of Improved Simulated Annealing Optimization Algorithms in Hardware/Software Partitioning of the Reconfigurable System-on-Chip

Cited by 16 publications

References 6 publications

Shuffled Frog Leaping Algorithm for Hardware/Software Partitioning

Shuffled Frog Leaping Algorithm for Hardware/Software Partitioning

A Memory-Reinforced Tabu Search Algorithm With Critical Path Awareness for HW/SW Partitioning on Reconfigurable MPSoCs

Collective Behavior Bees for Solving HW/SW Partitioning and Scheduling Problems in RSoC

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