2005
DOI: 10.1016/j.msea.2004.12.001
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Application of three-dimensional dislocation dynamics simulation to the STI semiconductor structure

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Cited by 15 publications
(8 citation statements)
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“…These formed dislocations and defects are sources of leakage current which deteriorates transistor performances ( Fig. 1(a) [30]). In the pillar-shape MOSFET of this paper as well, similar stresses are applied to the pillar structure, and as a result, it was predicted that dislocations and stacking faults occur inside the pillar.…”
Section: A Hypothesis Of the Si Emissionmentioning
confidence: 99%
“…These formed dislocations and defects are sources of leakage current which deteriorates transistor performances ( Fig. 1(a) [30]). In the pillar-shape MOSFET of this paper as well, similar stresses are applied to the pillar structure, and as a result, it was predicted that dislocations and stacking faults occur inside the pillar.…”
Section: A Hypothesis Of the Si Emissionmentioning
confidence: 99%
“…Selective epitaxy by STI is a well-known example for alignments, which is widely used in high volume manufacturing of integrated circuits (ICs) [82][83][84][115][116][117][118][119][120][121][122]. During IC fabrication, STI was created before the deposition of high mobility materials.…”
Section: Dielectric-based Alignmentmentioning
confidence: 99%
“…However, systems with and without SSFs have different amounts of free energy due to the QWA mechanism, and this difference does not fully explain the evolution of SSFs dependent on only the applied stress. Recently, dislocation theory [11][12][13][14][15][16] has been applied to predict plastic deformation considering the dislocation motion in microstructures using, for example, discrete dislocation dynamics (DDD). These works have described the longrange elastic interaction using the Peach-Koehler equation 17) as a continuum model and also have modeled the strong nonlinear short-range interactions phenomenologically as a rate process.…”
Section: Introductionmentioning
confidence: 99%