2010
DOI: 10.5120/164-289
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Application of VEE Pro Software for Measurement of MOS Device Parameters using C-V curve

Abstract: For a capacitor formed of MOS device using Metal-silicon dioxide-silicon (MOS) layers with an oxide thickness of 528 Å (measured optically), some of the material parameters were found from the curve drawn between Capacitance vs Voltage (C-V) through the Visual Engineering Environment Programming (VEE Pro) software. To perform the measurment, process by a distance, from the hazardous room, we use VEE Pro software. In this research, to find good result, vary the voltage with smaller increments and perform the me… Show more

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Cited by 14 publications
(10 citation statements)
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“…It cannot be employed to determine the equivalent oxide thickness of the high dielectric constant (high-K) materials, proposed for future ULSI CMOS application, because dielectric constants of these materials are different to that of oxide. Furthermore, the thickness of thick oxide can also be derived from the electrical capacitance-voltage (C-V ) data in inversion region or strong accumulation region [43,44]. However, this method cannot be applied directly for thin oxide, because the thickness measured from C-V curve consists of polygate depletion width, oxide thickness, and inversion charge thickness for the inversion state.…”
Section: Computation Of Flat-band and Power Dissipationmentioning
confidence: 99%
“…It cannot be employed to determine the equivalent oxide thickness of the high dielectric constant (high-K) materials, proposed for future ULSI CMOS application, because dielectric constants of these materials are different to that of oxide. Furthermore, the thickness of thick oxide can also be derived from the electrical capacitance-voltage (C-V ) data in inversion region or strong accumulation region [43,44]. However, this method cannot be applied directly for thin oxide, because the thickness measured from C-V curve consists of polygate depletion width, oxide thickness, and inversion charge thickness for the inversion state.…”
Section: Computation Of Flat-band and Power Dissipationmentioning
confidence: 99%
“…Since the interface contact resistance is inversely proportional to the total gate area as in term of length and width of a gate. The reduction of resistance should lead to improved RF properties in MOSFETs [5,[23][24][25][26][27][28]. In Figure 10 these diodes are represented by their junction capacitances, C sb and C db .…”
Section: Effective Resistance Of Dp4t Rf Cmos Due To Double-gatementioning
confidence: 99%
“…In the radio transceiver the switches, traditional n-MOS switch has better performance compare to PIN diodes (use of PIN diodes consumes more power), but only for a single operating frequency [1,2]. For multiple operating frequencies, high signal distortions are easily observed, which results in an unrecognizable information signal at the receiver end which would be measured by using the curve of capacitance and voltage with VEE Pro software [3,4]. A continuous scaling of CMOS technology has a better performance of both frequency and noise, where it is becoming a rigorous part for RF applications in the GHz frequency regime of the spectrum.…”
Section: Introductionmentioning
confidence: 99%
“…We can experiment with program flow and data processing with only LCR meter and VEE programming. VEE provides an Instrument Manager and a Dynamic input/output (I/O) server to simplify the tasks of discovering, configuring, and managing external instruments [8][9][10]. The VEE supports several types of instrument drivers.…”
Section: Introductionmentioning
confidence: 99%