Artificial Defects in Si₃N₄Enhance Nonvolatile Memory Performance of Ultra-Thin Body Poly-Si Junctionless Field-Effect Transistors

Abstract

This work presents a trench structure with n-type and p-type junctionless field-effect transistor (JL-FET) based on ultra-thin body (UTB) nonvolatile memory (NVM) devices with double stacked Si3N4 defect charge trapping layers (NN-CTLs). The n-type device exhibits excellent memory characteristics, including high program/erase (P/E) speed, good endurance (>104 cycles) and excellent (10-year) data retention at 85°C which achieve memory industry requirement. This simple double stacked Si3N4 trench JL-FET structure provides extra deep charge trapping sites in CTL, which improves the performance of JL-SONNOS NVMs for 3D NAND flash applications.