Assuring application-level correctness against soft errors

Cong,; Gururaj,

doi:10.1109/iccad.2011.6105319

Cited by 32 publications

(16 citation statements)

References 26 publications

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“…We compare with error detector placement work by Thomas et al [21] in Section V. Sundaram et al [29] propose selective replication of instructions that has 30% to 75% performance overhead. Cong et al [30] propose an approach to protect instructions based on their criticality. The technique is a combination of static analysis and dynamic monitoring.…”

Section: Experimental Evaluation and Analysismentioning

confidence: 99%

Harnessing Soft Computations for Low-Budget Fault Tolerance

Khudia

Mahlke

2014

2014 47th Annual IEEE/ACM International Symposium on Microarchitecture

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A growing number of applications from various domains such as multimedia, machine learning and computer vision are inherently fault tolerant. However, for these soft workloads, not all computations are fault tolerant (e.g., a loop trip count). In this paper, we propose a compiler-based approach that takes advantage of soft computations inherent in the aforementioned class of workloads to bring down the cost of software-only transient fault detection. The technique works by identifying a small subset of critical variables that are necessary for correct macro-operation of the program. Traditional duplication and comparison are used to protect these variables. For the remaining variables and temporaries that only affect the micro-operation of the program, strategic expected value checks are inserted into the code. Intuitively, a computation-chain result near the expected value is either correct or close enough to the correct result so that it does not matter for non-critical variables. Overall, the proposed solution has, on average, only 19.5% performance overhead and reduces the number of silent data corruptions from 15% down to 7.3% and user-visible silent data corruptions from 3.4% down to 1.2% in comparison to an unmodified application. This unacceptable silent data corruption rate is even lower than a traditional full duplication scheme that has, on average, 57% overhead.

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Section: Experimental Evaluation and Analysismentioning

confidence: 99%

Harnessing Soft Computations for Low-Budget Fault Tolerance

Khudia

Mahlke

2014

2014 47th Annual IEEE/ACM International Symposium on Microarchitecture

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“…They propose to transfer to the software world the concept of selective hardening, typical from the hardware world [22,39,40]. In [15,16], the authors propose the selective instruction replication to guarantee the application-level correctness in multimedia applications. This kind of applications can tolerate, in some cases, a execution which is not 100% numerically correct, and the program results can still appear to be correct from the user perspective [41].…”

Section: Related Workmentioning

confidence: 99%

“…1, instructions 1, 3, and 13 are classified as inSoR and are followed by data replication instructions on the hardened code (lines: 2, 4, and 14). Instructions 5,8,11,15, and 18 are classified as none. Instructions 5, and 15 perform an arithmetic operation, thus, they are replicated after the original instruction using the register copies (lines: 6, 7, 16, and 17).…”

Section: Fig 1 Example Hardened Program Using Swift-rmentioning

confidence: 99%

“…In many cases, this is the main difficulty for the software-based techniques feasibility. In order to reduce these overheads and to offer more flexibility to designers, recent works have proposed the selective hardening based on software [14][15][16]. This consists of protecting only specific parts of the program or the microprocessor architectural resources (reachable from the instruction set architecture -ISA) by means of redundant software.…”

Section: Introductionmentioning

confidence: 99%

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Selective SWIFT-R

et al. 2013

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Commercial off-the-shelf microprocessors are the core of low-cost embedded systems due to their programmability and cost-effectiveness. Recent advances in electronic technologies have allowed remarkable improvements in their performance. However, they have also made microprocessors more susceptible to transient faults induced by radiation. These non-destructive events (soft errors), may cause a microprocessor to produce a wrong computation result or lose control of a system with catastrophic consequences. Therefore, soft error mitigation has become a compulsory requirement for an increasing number of applications, which operate from the space to the ground level. In this context, this paper uses the concept of selective hardening, which is aimed to design reduced-overhead and flexible mitigation techniques. Following this concept, a novel flexible version of the software-based fault recovery technique known as SWIFT-R is proposed. Our approach makes possible to select different registers subsets from the microprocessor register file to be protected on software. Thus, design space is enriched with a wide spectrum of new partially protected versions, which offer more flexibility to designers. This permits to find the best tradeoffs between performance, code size, and fault coverage. Three case studies have been developed to show the applicability and flexibility of the proposal.

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“…Only selected portions of the application will be protected, not the entire application. Few works based on selective hardening aim to guarantee application-level correctness in multimedia applications [24] [25]. For multimedia applications, some errors can be tolerated since they will not be noticed by the user [26].…”

Section: Selective Hardeningmentioning

confidence: 99%

S-SETA: Selective Software-Only Error-Detection Technique Using Assertions

Chielle

Rodrigues

Kastensmidt

et al. 2015

IEEE Trans. Nucl. Sci.

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Abstract-Software-based techniques offer several advantages to increase the reliability of processor-based systems at very low cost, but they cause performance degradation and an increase of the code size. To meet constraints in performance and memory, we propose SETA, a new control-flow software-only technique that uses assertions to detect errors affecting the program flow. SETA is an independent technique, but it was conceived to work together with previously proposed data-flow techniques that aim at reducing performance and memory overheads. Thus, SETA is combined with such data-flow techniques and submitted to a fault injection campaign. Simulation and neutron induced SEE tests show high fault coverage at performance and memory overheads inferior to the state-of-the-art.

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Assuring application-level correctness against soft errors

Abstract: ABSTRACT

Cited by 32 publications

References 26 publications

Harnessing Soft Computations for Low-Budget Fault Tolerance

Harnessing Soft Computations for Low-Budget Fault Tolerance

Selective SWIFT-R

S-SETA: Selective Software-Only Error-Detection Technique Using Assertions

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