Asymmetric Driving Current Modification of CMOS LTPS-TFTs With ${\rm HfO}_{2}$ Gate Dielectric

Abstract

In this paper, the asymmetric driving current I drv modification of CMOS low-temperature poly-Si thin-film transistors (LTPS-TFTs) with HfO 2 gate dielectric is demonstrated by the interfacial layer (IL) engineering of HfO 2 /poly-Si interface. P-channel LTPS-TFT has much higher I drv ∼ 0.789 mA than the n-channel LTPS-TFT ∼ 0.274 mA under the same overdrive gate voltage. This asymmetric I drv is due to the characteristics of field effect mobility µ FE that p-channel LTPS-TFT has much higher hole µ FE ∼80.16 cm 2 /Vs than the electron µ FE ∼ 38.26 cm 2 /V s of n-channel LTPS-TFT. The modification of HfO 2 /poly-Si interface by O 2 plasma can enhance the electron µ FE ∼ 34% and reduce the hole µ FE ∼ 22.4%, resulting in balanced I drv of CMOS LTPS-TFTs that n-channel device shows I drv ∼ 0.553 mA and p-channel device shows I drv ∼ 0.590 mA. In addition, the phonon scattering would also be improved by the IL growth and recovered to initial condition after IL removal. Consequently, the IL engineering of CMOS LTPS-TFTs with HfO 2 gate dielectric would be a good candidate for the application of system-on-panel or 3-D integrated circuits. Index Terms-3-D integrated circuits (3-D-ICs), HfO 2 , interfacial layer (IL), low-temperature poly-Si thin-film transistors (LTPS-TFTs), system-on-panel (SOP).

Excellent Mechanical Durability of In‐Folding Stress of Poly‐Si Thin‐Film Transistor on Plastic Substrate Compared with Out‐Folding: Generation of Gate Leakage Currents in Flexible Poly‐Si Thin‐Film Transistor by Out‐Folding and Bias‐Temperature Stress

“…The p-channel metal oxide semiconductor (PMOS) architecture using LTPS TFT is preferred over n-channel metal oxide semiconductor (NMOS) TFT in display applications, because it is less likely to be influenced by the bias stress. [21][22][23][24][25] The mechanical stability of the TFT backplane is very important to realize the reliability of foldable AMOLED displays. Most of the small size mobile displays use LTPS TFT backplane; however, the mechanical stability remains a critical issue to be solved.…”

“…The p‐channel metal oxide semiconductor (PMOS) architecture using LTPS TFT is preferred over n‐channel metal oxide semiconductor (NMOS) TFT in display applications, because it is less likely to be influenced by the bias stress. [ 21–25 ]…”

Thermally curable polymers consisting of alcohol-functionalized cyclotetrasiloxane and melamine derivatives for use as insulators in OTFTs

“…Gate insulators require high dielectric constants, good heat and chemical resistances, low leakage current level, and pattern-forming properties. Inorganic metal oxides with high dielectric constant such as titanium dioxide (TiO 2 ) [7], silicon dioxide (SiO 2 ) [8], aluminum oxide (Al 2 O 3 ) [9], barium titanate (BaTiO 3 ) [10], and hafnium dioxide (HfO 2 ) [11] all attested in the literature. While some of these show good performance, they are also expensive to produce and cannot be used as large, flexible substrates due to their high processing temperature.…”