Proceedings of the 2002 International Symposium on Low Power Electronics and Design - ISLPED '02 2002
DOI: 10.1145/566457.566458
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Automated selective multi-threshold design for ultra-low standby applications

Abstract: This paper describes an automated design technique to selectively use multi-threshold CMOS (MTCMOS) in a cell-by-cell fashion. MT cells consisting of low-Vth transistors and high-Vth sleep transistors are assigned to critical paths, while high-Vth cells are assigned to non-critical paths. Compared to the conventional MTCMOS, the gate delay is not affected by the discharge patterns of other gates because there is no virtual ground to be shared. We applied this technique to a test chip of a DSP core. The worst p… Show more

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Cited by 13 publications
(18 citation statements)
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“…The results show that the proposed PG structure is a practicable solution for high energy reduction in ultra-low voltage nanoscale CMOS circuits. [3], Two-pass PG [4], Zigzag PG [5], and Selective PG [6]) cannot be used due to the impractical delay increase and long wakeup time. …”
Section: Discussionmentioning
confidence: 99%
See 1 more Smart Citation
“…The results show that the proposed PG structure is a practicable solution for high energy reduction in ultra-low voltage nanoscale CMOS circuits. [3], Two-pass PG [4], Zigzag PG [5], and Selective PG [6]) cannot be used due to the impractical delay increase and long wakeup time. …”
Section: Discussionmentioning
confidence: 99%
“…As an attempt to overcome these problems, several PG structures have been suggested [2]- [6]. However, these PG structures are no longer effective in sub-1V region because the high-V th of the PG structures degrades the operation frequency and increases wakeup time rapidly at the low voltage.…”
Section: Introductionmentioning
confidence: 99%
“…4, which corresponds to the industrial example used in Section IV). Sizing can therefore be performed more economically by changing the NMOS size and deducing V sv 2 Note that V sv has to be higher than the minimum voltage needed for data retention, since there is a voltage drop across M2 in standby mode. from the average leakage current of the circuit, with V ddv set to the minimum voltage that supports data retention.…”
Section: Supply Switching With Ground Collapsementioning
confidence: 99%
“…Reducing subthreshold leakage has therefore been conceived as a key to achieving low standby power. Power gating [1], [2], [3] uses a current switch to cut off a circuit from its power supply rails during standby mode, and has been widely used in the semiconductor industry to reduce subthreshold leakage [4], [5], [6], [7].…”
Section: Introductionmentioning
confidence: 99%
“…cells with sleep transistors) in the critical paths. Unlike [3] which uses a giant footswitch, the granularity is such that footswitches are implemented in standard cells for the combinational logic [4]. The fact that both non-footswitch and footswitch cells can be placed in the same row ( Fig.…”
mentioning
confidence: 99%