Automated visual inspection for lsi water multilayer patterns by cascade pattern matching algorithm

Abstract

This paper reports on the defect detection algorithm for the LSI wafer multilayer patterns, together with the result of evaluation. The multilayer patterns are constructed by the exposure after alignment between the wafer pattern and the reticle pattern for each chip. Consequently, the position relation between layers is different even for adjacent chips (interlayer registration error). The developed algorithm compares the gray‐level images of adjacent chips on the wafer and extracts the defect without being affected by the inter‐layer registration error. First, the pattern edge is extracted from the gray‐level image, and the position alignment is executed using the edges. Then, by eliminating the region where gray levels are equal, the regions are extracted for which the position alignment is unsatisfactory. The position alignment is attempted again for that region. This procedure is iterated. When the unmatched region of the pattern edge is sufficiently small, it is decided that the interlayer registration error is absorbed, and the unmatched region is extracted as the defect. An automatic visual inspection system was constructed and evaluated experimentally. As a result, it was verified that the whole chip area can be inspected, and the defect of 0.5 μm or more can be detected in a stable way.

Threshold setting assisted by numerical analysis methods in automatic visual inspection using gray-scale image comparison

“…This procedure was repeated thrice. The threshold value of 18 as found above is appropriate for comparison patterns within a chip, but in the case of comparative inspection of multiple chips, the intensity may differ even in normal parts because of interlayer registration [1], which leads to false alarms. As may be seen from Fig.…”

“…Among these characteristics, the detection rate is a main parameter of an inspection system, and therefore its improvement is the principal objective of new developments. In this context, effort has been focused on higher resolution of optical systems and better performance of comparison algorithms [1]. On the other hand, with operation of inspection systems integrated into production lines, as considered in this paper, the primary condition is to ensure detection sensitivity as required by process specifications.…”

“…Previously, the authors developed an algorithm for defect detection using cascade pattern matching in terms of visual inspection of multilayer patterns [1]. To allow for interlayer registration that occurs in a step-and-repeat process using reduction-projection exposure systems, in pattern comparison inspection, the aforementioned algorithm assumes that gray-scale images of two chips are aligned, and coincident parts are deleted in the course of multiple iterations.…”

Automated post bonding inspection by using machine vision techniques

“…Although vision-based inspection systems have been introduced in various stages of IC manufacturing (Kimura and Iyanaga 1986, Kimura and Kamashita 1988, Yoda et al 1988, Chapman et al 1990, Kimura 1990, Maeda et al 1990, Tsukahara et al 1992, Sreenivasan et al 1993, Khotanzad et al 1994, Wu et al 1996, Wang et al 1997, there has been little attempt at wire bond inspection.…”

Development of auto defect classification system on porosity powder metallurgy products

“…Then, they compared the image with data base to recognize the defects. A variety of AOI systems have been applied extensively to IC [7][8][9], PCB [10,11], machine tools [12,13] and gas pipelines [14]. It is noted that all the above methods for defect inspection are based on a very clean template or ruled geometry.…”