Automatic layout design for power module

Ning, Puqi; Wang, Fei; Ngo, Khai D. T.

doi:10.1109/tpel.2011.2180739

Cited by 46 publications

(6 citation statements)

References 13 publications

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“…Since all SiC dies are tested in advance to packaging, their electrical parameters are known and it allows the preselection to be implemented. Several computer-aided automatic layout generation methods aiming at minimizing the parasitic inductance in the current loop have been introduced in [114], [115], [116], and [117]. More AI-involved layout design will be the future trend of power semiconductor device packaging development.…”

Section: Conclusion and Insight Of Current Sharing Strategiesmentioning

confidence: 99%

Parallel Connection of Silicon Carbide MOSFETs—Challenges, Mechanism, and Solutions

Zhao

Wang

et al. 2023

IEEE Trans. Power Electron.

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Power semiconductor devices are often connected in parallel to increase the current rating of the power conversion systems. However, due to mismatched circuit parameters or semiconductor fabrication discrepancies, the current of paralleled power semiconductor devices can be unbalanced, which potentially leads to accelerated aging and long-term reliability issues. The fast-switching speed of silicon carbide (SiC) devices aggravates this problem due to its higher sensitivity to parasitic parameters. Numerous efforts have been dedicated to analyzing and addressing the current imbalance issue of paralleling SiC devices. This article comprehensively summarizes and presents state-of-the-art research regarding the current imbalance in paralleled SiC devices. Degree of imbalance is proposed to comprehensively quantify the current mismatch. Starting with mechanism analysis, different types of current imbalance are categorized. Various device parameters and the package layout that impact the current distribution are investigated. The existing solutions including passive methods and active methods are concluded and categorized. This work also incorporates insight into the future development needs of high-power multichip SiC module packaging and driving technologies.

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Section: Conclusion and Insight Of Current Sharing Strategiesmentioning

confidence: 99%

Parallel Connection of Silicon Carbide MOSFETs—Challenges, Mechanism, and Solutions

Zhao

Wang

et al. 2023

IEEE Trans. Power Electron.

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“…The power and control terminals (figure 15-E ) connect the DBC substrate with the outside of the power module enclosure [297]. In general, these terminals are long and narrow, which significantly increases the total parasitic inductance of the module.…”

Section: Terminalsmentioning

confidence: 99%

“…Usually, the terminals have two pads to provide a good mechanical robustness and balance the current distribution in the connector (figure 22(a)) 8 . The gate and power tracks must be designed to flow equal currents through the multiple pads that constitute the terminal, in order to minimize possible current distribution imbalances [297]. According to this symmetric concept, the terminals should be designed with a minimum even number of pads.…”

Section: Terminalsmentioning

confidence: 99%

“…It must be bear in mind that a well organized and appropriate design flow will allow to simplify and accelerate the whole design process of the module. This topic has been addressed in the scientific literature [251,276,289,297]. However, this paper particularizes such work-flows to the WBG context and to the automotive application.…”

Section: Design Steps Of the Sic Power Modulementioning

confidence: 99%

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Power module electronics in HEV/EV applications: New trends in wide-bandgap semiconductor technologies and design aspects

Matallana

Ibarra

López

et al. 2019

Renewable and Sustainable Energy Reviews

124

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“…However, manufacturing limits bring excessive internal defects that restrict the current conduction capacity of a single die. Therefore, in high-power and high-current applications, power modules often require a parallel connection of a large number of SiC dies [7]- [9]. As a result, the layout design of power modules with multiple chips in parallel becomes particularly important.…”

mentioning

confidence: 99%

A Novel Multiple DBC-staked units Package to Parallel More Chips for SiC Power Module

Hui,

Ning,

Fan

et al. 2024

Trans. Electr. Mach. Syst.

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Silicon carbide (SiC) power modules play an essential role in the electric vehicle drive system. To improve their performance, reduce their size, and increase production efficiency, this paper proposes a multiple staked direct bonded copper (DBC) unit based power module packaging method to parallel more chips. This method utilizes mutual inductance cancellation effect to reduce parasitic inductance. Because the conduction area in the new package is doubled, the overall area of power module can be reduced. Entire power module is divided into smaller units to enhance manufacture yield, and improve design freedom. This paper provides a detailed design, analysis and fabrication procedure for the proposed package structure. Additionally, this paper offers several feasible solutions for the connection between power terminals and DBC untis. With the structure, 18 dies were paralleled for each phase-leg in a econodual size power module. Both simulation and double pulse test results demonstrate that, compared to conventional layouts, the proposed package method has 74.8% smaller parasitic inductance and 34.9% lower footprint.

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Automatic layout design for power module

Cited by 46 publications

References 13 publications

Parallel Connection of Silicon Carbide MOSFETs—Challenges, Mechanism, and Solutions

Parallel Connection of Silicon Carbide MOSFETs—Challenges, Mechanism, and Solutions

Power module electronics in HEV/EV applications: New trends in wide-bandgap semiconductor technologies and design aspects

A Novel Multiple DBC-staked units Package to Parallel More Chips for SiC Power Module

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