logic levels to physically mimic a biological system, which is favorable in artificial neural networks and neuromorphic computing. [4][5][6] Thin-film-based FeFETs are normally accompanied by complex interfacial issues, including defects, oxide layers, strain, and charge traps, owing to the lattice mismatch between ferroelectric and semiconductor crystals, which causes uncertainties in device operation. [7,8] 2D semiconductors with an atomically thin nature and dangling bond-free surfaces can be stacked with ferroelectrics via van der Waals (vdW) forces to alleviate interfacial problems. Nonvolatile memory and artificial synaptic functions have been demonstrated in 2D vdW FeFETs. [9,10] Ferroelectrics possess a thermodynamically unstable negative-capacitance regime. [11] The series connection of positive capacitance to a ferroelectric can stabilize the ferroelectric capacitance in the negative regime. Therefore, a negative capacitance FET (NCFET) can be achieved in a ferroelectric-insulator-semiconductor (FIS) heterostructure by inserting a trivial dielectric (DE) into an FeFET. An NCFET is reported to exhibit hysteresis-free transfer characteristics with a subthermionic subthreshold swing (SS), which drastically differentiates it from an FeFET and is favorable for low-power consumption logic applications. [12,13] Recently, based on the so-called ferroelectric proximity effect, that is, nonvolatile electrostatic doping by ferroelectric polarization, programmable doping profiles in semiconductor channels have been reported by controlling local ferroelectric polarizations using a scanning probe technique or multiple-gate operation. [14,15] Consequently, a single 2D FeFET is capable of simultaneously performing logic, memory, and synaptic operations, and its functionality can be customized on demand. This device design concept facilitates the development of both inmemory computing and transistor-memory monolithic integration schemes to break through the physical separation between the memory and processing units in traditional von Neumann machines. [15] However, the gate operations of logic transistors may affect the polarization in the ferroelectric following the minor polarization-electric field (P-E) hysteresis loops, therebyThe functional reconfiguration of transistors and memory in homogenous ferroelectric devices offers significant opportunities for implementing the concepts of in-memory computing and logic-memory monolithic integration. Thus far, reconfiguration is realized through programmable doping profiles in the semiconductor channel using multiple-gate operation. This complex device architecture limits further scaling to match the overall chip requirements. Here, reconfigurable memory/transistor functionalities in a ferroelectric-gated van der Waals transistor by controlling the behavior of ferroelectric oxygen vacancies at the interface are demonstrated. Short-and long-term memory functions are demonstrated by modulating the border oxygen vacancy distribution and the associated charge dynamics. The qua...