BD180 - a new 0.18 μm BCD (Bipolar-CMOS-DMOS) Technology from 7V to 60V

Park, Il-Yong; Choi, Yong-Keon; Ko, Kwang-Young; Yoon, Chul-Jin; Jun, Bon-Keun; Kim, Miyoung; Lim, Hyon-Chol; Kim, Nam-Joo; Yoo, Kicheon

doi:10.1109/ispsd.2008.4538898

Cited by 19 publications

(4 citation statements)

References 4 publications

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“…7.27b, a dedicated N-drift region is placed under each drain, optimizing BV DSS versus R SP [2,5,33]. In this configuration, however, the Field-gap NLDMOS with shorted source-body contacts and dedicated P-body.…”

Section: Nldmos Configurationsmentioning

confidence: 99%

“…These applications cluster around different operating points, with 24 V for portable electronics; 60 V for automotive, solar, and LED backlighting; 85 V for power over Ethernet; 120 V for telecommunication; and 700 V for offline LED lighting, consumer, and industrial applications. As a result, BCD is now the technology of choice to realize power ICs by most integrated device manufacturers (IDM) and foundries [1][2][3][4][5].This chapter focuses mainly on transistors with voltage capabilities in the range of 20-700 V, where the bulk of the product applications lie. …”

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confidence: 99%

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High-Voltage and Power Transistors

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

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This chapter focuses mainly on the drain-extended MOS transistor, DEMOS, for high voltage applications, and on the lateral double-diffused MOS transistor, LDMOS, for high power applications. In both cases, the drain is extended with a lightly-doped region, referred to as the drift region, to sustain the high voltage. The chapter begins with an analysis of the drift region and its optimization, typically by reduced surface-field (RESURF) techniques. The transistor switching performance is then analyzed, followed by a discussion of DEMOS and LDMOS design considerations and characteristics. High-voltage and high-current effects are then described, including quasi-saturation, body current, on-state breakdown, and safe operating area (SOA). The chapter concludes with selected high-voltage device applications. IntroductionThe MOSFETs discussed in Chap. 6 are designed for digital, analog, mixed-signal, and RF applications that operate in the low-to-medium voltage range of about 0.8-6 V. Many analog applications, however, require transistors that can handle voltages above 20 V and currents in the ampere range. Those transistors are referred to as high-voltage and power transistors. This chapter provides a comprehensive analysis of the drain-extended MOS transistor (DEMOS), for high-voltage and low-current applications, and the lateral double-diffused MOS (LDMOS) transistor, LDMOS, for power applications. (The "D" in LDMOS describes the sequential (double) diffusion of boron and arsenic through the same oxide opening, defining a precise channel length (Chap. 9). The "L" means that the current path is parallel to the silicon surface (lateral), as opposed to "V" in VDMOS where the current is nearly vertical to the silicon surface.) Schematic cross sections of both transistors (Table 7.1). The DEMOS is typically processed without added process complexity, whereas the LDMOS requires optimization of the P-body and N-drift regions to achieve high voltages and currents while minimizing the drain-to-source resistance and transistor area.The interest in bipolar, CMOS, and DMOS (BCD) technologies has been driven primarily by the proliferation of portable electronics, automotive electronics, and the need for energy efficiency. These applications cluster around different operating points, with 24 V for portable electronics; 60 V for automotive, solar, and LED backlighting; 85 V for power over Ethernet; 120 V for telecommunication; and 700 V for offline LED lighting, consumer, and industrial applications. As a result, BCD is now the technology of choice to realize power ICs by most integrated device manufacturers (IDM) and foundries [1][2][3][4][5].This chapter focuses mainly on transistors with voltage capabilities in the range of 20-700 V, where the bulk of the product applications lie.

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Section: Nldmos Configurationsmentioning

confidence: 99%

mentioning

confidence: 99%

High-Voltage and Power Transistors

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

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“…Because AN180 process has dual gate oxide for 1.8V and 5V, even if only 5V CMOS process options must have 1.8V oxide thermal process in the baseline process to keep the compatibility. To improve the 1/f noise of 5V CMOS, AN180 process employed pure gate oxide process for 1.8V oxide while the 0.18 µm BCD process used NO oxide in the previous technology [3]. Fig.…”

Section: A 5v Cmosmentioning

confidence: 99%

A versatile 30V analog CMOS process in a 0.18μm technology for power management application

Choi

Park

Lim

et al. 2011

2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs

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a versatile 30V analog CMOS process in a 0.18 µm technology node has been developed by using cost-effective and modular fashion. To reduce the thermal budget deep NWELL isolation is formed after CMOS well formation. The drainextended (DE) CMOS from 7V to 30V shows very competitive trade-off performance between the breakdown voltage and the specific on-resistance. In addition, low 1/f noise of 5V CMOS can be obtained by pure gate oxide process.

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“…With the booming market of power integrated circuits for the smart power management [1][2][3][4] and automotive and green energy, BCD [5,6] (Bipolar-CMOS-DMOS) technology has been proved to be the best solution for these applications. People tend to integrate as much active and passive devices, including resistors, for different voltages' applications as possible on single chip.…”

Section: Introductionmentioning

confidence: 99%

Characteristics and Breakdown Behaviors of Polysilicon Resistors for High Voltage Applications

Tang

Dong²

2015

Advances in Condensed Matter Physics

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With the rapid development of the power integrated circuit technology, polysilicon resistors have been widely used not only in traditional CMOS circuits, but also in the high voltage applications. However, there have been few detailed reports about the polysilicon resistors’ characteristics, like voltage and temperature coefficients and breakdown behaviors which are critical parameters of high voltage applications. In this study, we experimentally find that the resistance of the polysilicon resistor with a relatively low doping concentration shows negative voltage and temperature coefficients, while that of the polysilicon resistor with a high doping concentration has positive voltage and temperature coefficients. Moreover, from the experimental results of breakdown voltages of the polysilicon resistors, it could be deduced that the breakdown of polysilicon resistors is thermally rather than electrically induced. We also proposed to add an N-type well underneath the oxide to increase the breakdown voltage in the vertical direction when the substrate is P-type doped.

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BD180 - a new 0.18 μm BCD (Bipolar-CMOS-DMOS) Technology from 7V to 60V

Cited by 19 publications

References 4 publications

High-Voltage and Power Transistors

High-Voltage and Power Transistors

A versatile 30V analog CMOS process in a 0.18μm technology for power management application

Characteristics and Breakdown Behaviors of Polysilicon Resistors for High Voltage Applications

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BD180 - a new 0.18 μm BCD (Bipolar-CMOS-DMOS) Technology from 7V to 60V

Cited by 19 publications

References 4 publications

High-Voltage and Power Transistors

High-Voltage and Power Transistors

A versatile 30V analog CMOS process in a 0.18&#x03BC;m technology for power management application

Characteristics and Breakdown Behaviors of Polysilicon Resistors for High Voltage Applications

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Product

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A versatile 30V analog CMOS process in a 0.18μm technology for power management application