Bendable Single Crystal Silicon Nanomembrane Thin Film Transistors with Improved Low-Temperature Processed Metal/n-Si Ohmic Contact by Inserting TiO2 Interlayer

Abstract

Bendable single crystal silicon nanomembrane thin film transistors (SiNMs TFTs), employing a simple method which can improve the metal/n-Silicon (Si) contact characteristics by inserting the titanium dioxide (TiO2) interlayer deposited by atomic layer deposition (ALD) at a low temperature (90 °C), are fabricated on ITO/PET flexible substrates. Current-voltage characteristics of titanium (Ti)/insertion layer (IL)/n-Si structures demonstrates that they are typically ohmic contacts. X-ray photoelectron spectroscopy (XPS) results determines that TiO2 is oxygen-vacancies rich, which may dope TiO2 and contribute to a lower resistance. By inserting TiO2 between Ti and n-Si, Ids of bendable single crystal SiNMs TFTs increases 3–10 times than those without the TiO2 insertion layer. The fabricated bendable devices show superior flexible properties. The TFTs, whose electrical properties keeps almost unchanged in 800 cycles bending with a bending radius of 0.75 cm, obtains the durability in bending test. All of the results confirm that it is a promising method to insert the TiO2 interlayer for improving the Metal/n-Si ohmic contact in fabrication of bendable single crystal SiNMs TFTs.

Electrochemically triggered degradation of silicon membranes for smart on-demand transient electronic devices

“…As the peak strain of materials under deformation scales down with thickness, thin Si membranes ensure a low strain level upon bending or buckling and therefore will probably not significantly influence its electrical performance [50]. In fact, Si membrane devices have been reported to have electrical performance depending on the bending conditions [51], and it has been proved that Si membrane devices can maintain good electrical behavior under a certain degree of bending [52][53][54]. As the buckling on Si membrane devices could be regarded as anisotropic bending, non-severe buckling alone would probably not lead to critical device failure.…”

Optimization of Sacrificial Layer Etching in Single-Crystal Silicon Nano-Films Transfer Printing for Heterogeneous Integration Application

“…Therefore, it is extremely urgent to integrate monocrystalline silicon devices and compound semiconductor devices through heterogeneous integration to meet the development requirements of ultra-miniaturization, intelligence, and diversification of electronic systems, and to break through the limitations of silicon bulk materials. There are several methods in the current stage of heterogeneous integration technology, such as epitaxial growth, bonding, three-dimensional packaging, and transfer printing [2][3][4][5][6][7][8][9]. This article mainly studies the transfer technology applied in the field of heterogeneous integration.…”

High-performance Acetone Soluble Tape Transfer Printing Method for Heterogeneous Integration

“…GaN and Ga 2 O 3 can be used to fabricate power devices, GaAs can be used to fabricate high-frequency devices, and Si can be used to fabricate digital control circuitry) is a key means to increase the integration scale and functional diversity of chip 1,2 . Transfer printing is a widely adopted method for heterogeneous integration, typically, by using PDMS 3–7 , thermal release tape (TRT) 8 , water soluble tape (WST) 9 and laser-driven non-contact transfer printing 10–12 . PDMS is a widely used transfer printing method which is accepted by people.…”