Braindrop: A Mixed-Signal Neuromorphic Architecture With a Dynamical Systems-Based Programming Model

Neckar, Alexander; Fok, Sam; Benjamin, Ben Varkey; Stewart, Terrence C.; Oza, Nick N.; Voelker, Aaron R.; Eliasmith, Chris; Manohar, Rajit; Boahen, Kwabena

doi:10.1109/jproc.2018.2881432

Cited by 185 publications

(128 citation statements)

References 31 publications

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“…• The degree of modularity achievable in hardware may be impacted in each case. The (1,16) case requires 16x XOR gates in order to perform one item-item binding whilst in the (16,1) case requires a single 16-bit adder. In the case of large values of C there may be an additional impact on speed (how viable is to make a 512-bit adder that computes an answer in one clock cycle/step?…”

Section: Discussionmentioning

confidence: 99%

A semi-holographic hyperdimensional representation system for hardware-friendly cognitive computing

Serb

Kobyzev

Wang

et al. 2019

Phil. Trans. R. Soc. A.

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One of the main, long-term objectives of artificial intelligence is the creation of thinking machines. To that end, substantial effort has been placed into designing cognitive systems; i.e. systems that can manipulate semantic-level information. A substantial part of that effort is oriented towards designing the mathematical machinery underlying cognition in a way that is very efficiently implementable in hardware. In this work, we propose a ‘semi-holographic’ representation system that can be implemented in hardware using only multiplexing and addition operations, thus avoiding the need for expensive multiplication. The resulting architecture can be readily constructed by recycling standard microprocessor elements and is capable of performing two key mathematical operations frequently used in cognition, superposition and binding, within a budget of below 6 pJ for 64-bit operands. Our proposed ‘cognitive processing unit’ is intended as just one (albeit crucial) part of much larger cognitive systems where artificial neural networks of all kinds and associative memories work in concord to give rise to intelligence. This article is part of the theme issue ‘Harmonizing energy-autonomous computing and intelligence’.

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Section: Discussionmentioning

confidence: 99%

A semi-holographic hyperdimensional representation system for hardware-friendly cognitive computing

Serb

Kobyzev

Wang

et al. 2019

Phil. Trans. R. Soc. A.

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“…If the system is implemented in digital, the behaviors of neurons and synapses are approximated and the spiking and AER structure of the system is realized in digital architectures . However, if the system is designed in mixed analog–digital domain, the synaptic and neuronal behaviors are replicated closely in analog, whereas AER and interfacing are realized using digital technology …”

Section: Neuromorphic Systems Designmentioning

confidence: 99%

“…Neuromorphic computing was coined by Mead, when he envisioned that while exploiting the similarities between semiconductor physics and biological neural systems, one may develop brain‐inspired computing platforms. Ever since, neuromorphic research has evolved and researchers are implementing various technologies, from conventional semiconductors, as proposed by Mead, to memristive systems, to hybrid CMOS–memristive designs to develop neuro‐mimicking platforms for replicating experimental results observed in biology or for neuro‐inspired platforms used in computing systems …”

Section: Introductionmentioning

confidence: 99%

Complementary Metal‐Oxide Semiconductor and Memristive Hardware for Neuromorphic Computing

Azghadi

Chen

Eshraghian

et al. 2020

Advanced Intelligent Systems

101

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The ever‐increasing processing power demands of digital computers cannot continue to be fulfilled indefinitely unless there is a paradigm shift in computing. Neuromorphic computing, which takes inspiration from the highly parallel, low‐power, high‐speed, and noise‐tolerant computing capabilities of the brain, may provide such a shift. Many researchers from across academia and industry have been studying materials, devices, circuits, and systems, to implement some of the functions of networks of neurons and synapses to develop neuromorphic computing platforms. These platforms are being designed using various hardware technologies, including the well‐established complementary metal‐oxide semiconductor (CMOS), and emerging memristive technologies such as SiOx‐based memristors. Herein, recent progress in CMOS, SiOx‐based memristive, and mixed CMOS‐memristive hardware for neuromorphic systems is highlighted. New and published results from various devices are provided that are developed to replicate selected functions of neurons, synapses, and simple spiking networks. It is shown that the CMOS and memristive devices are assembled in different neuromorphic learning platforms to perform simple cognitive tasks such as classification of spike rate‐based patterns or handwritten digits. Herein, it is envisioned that what is demonstrated is useful to the unconventional computing research community by providing insights into advances in neuromorphic hardware technologies.

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“…Pure and mixed-mode analog accelerators have been developed for accelerating a broad range of applications, including neural networks, SAT solvers, and neuromorphic computations [4,11,19,26,28,32,37]. One prominent line of work focuses on analog accelerators that target dynamical systems [7,8,15,18,34,41,43,45,46].…”

Section: Related Workmentioning

confidence: 99%

Noise-Aware Dynamical System Compilation for Analog Devices with Legno

Achour

Rinard

2020

Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Syste

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Reconfigurable analog devices are a powerful new computing substrate especially appropriate for executing computationally intensive dynamical system computations in an energy efficient manner. We present Legno, a compilation toolchain for programmable analog devices. Legno targets the HCDCv2, a programmable analog device designed to execute general nonlinear dynamical systems. To the best of our knowledge, Legno is the first compiler to successfully target a physical (as opposed to simulated) programmable analog device for dynamical systems and this paper is the first to present experimental results for any compiled computation executing on any physical programmable analog device of this class. The Legno compiler synthesizes analog circuits from parametric and specialized blocks and accounts for analog noise, quantization error, and manufacturing variations within the device. We evaluate the compiled configurations on the Sendyne S100Asy RevU development board on twelve benchmarks from physics, controls, and biology. Our results show that Legno produces accurate computations on the analog device. The computations execute in 0.50-5.92 ms and consume 0.28-5.67 µJ of energy. CCS Concepts. • Computer systems organization → Analog computers; • Software and its engineering → Compilers.

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Braindrop: A Mixed-Signal Neuromorphic Architecture With a Dynamical Systems-Based Programming Model

Cited by 185 publications

References 31 publications

A semi-holographic hyperdimensional representation system for hardware-friendly cognitive computing

A semi-holographic hyperdimensional representation system for hardware-friendly cognitive computing

Complementary Metal‐Oxide Semiconductor and Memristive Hardware for Neuromorphic Computing

Noise-Aware Dynamical System Compilation for Analog Devices with Legno

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