BSIM3 parameters extraction of a 0.35 μm CMOS technology from 300K down to 77K

Varizat, Laurent; Sou, Gérard; Mansour, Malik

doi:10.1088/1742-6596/834/1/012002

Cited by 5 publications

(1 citation statement)

References 4 publications

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“…Previous work has demonstrated that CMOS technologies have been characterized at temperatures down to 4K [21][22][23]. However, BSIM model parameters have only been extracted down to 77K, and no systematic modeling of PMOS and NMOS devices with different width-to-length ratios are performed under different bias conditions at lower cryogenic temperatures, to the best of our knowledge [1,[24][25][26][27].…”

Section: Introductionmentioning

confidence: 99%

Cryogenic Characerization and Modeling of Standard CMOS down to Liquid Helium Temperature for Quantum Computing

Li,

Luo,

et al. 2018

Preprint

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Cryogenic characterization and modeling of 0.18µm CMOS technology (1.8V and 5V) are presented in this paper. Several PMOS and NMOS transistors with different width to length ratios(W/L) were extensively characterized under various bias conditions at temperatures ranging from 300K down to 4.2K. We extracted their fundamental physical parameters and developed a compact model based on BSIM3V3. In addition to their I-V characteristics, threshold voltage(V th ) values, on/off current ratio, transconductance of the MOS transistors, and resistors on chips are measured at temperatures from 300K down to 4.2K. A simple subcircuit was built to correct the kink effect. This work provides experimental evidence for implementation of cryogenic CMOS technology, a valid industrial tape-out process model, and promotes the application of integrated circuits in cryogenic environments, including quantum measurement and control systems for quantum chips at very low temperatures.

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Section: Introductionmentioning

confidence: 99%

Cryogenic Characerization and Modeling of Standard CMOS down to Liquid Helium Temperature for Quantum Computing

Li,

Luo,

et al. 2018

Preprint

View full text Add to dashboard Cite

show abstract

Morphological, optical, and electrical characterizations and cryogenic reliability tests on AlInGaP red light emitting diodes immersed in liquid nitrogen

Lee

Hsieh

Chen

et al. 2021

J Mater Sci: Mater Electron

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Characterization and Modeling of 0.18μm Bulk CMOS Technology at Sub-Kelvin Temperature

Luo

et al. 2020

IEEE J. Electron Devices Soc.

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Previous cryogenic electronics studies are mostly at 77K and 4.2K. Cryogenic characterization of a 0.18µm standard bulk CMOS technology (operating voltages: 1.8V and 5V) is presented in this paper. Several NMOS and PMOS devices with different width to length ratios (W/L) were extensively tested and characterized under various bias conditions at sub-kelvin temperature. In addition to devices dc characteristics, the kink effect and current overshoot phenomenon are observed and discussed at sub-kelvin temperature. Especially, the current overshoot phenomenon in PMOS devices at sub-kelvin temperature is shown for the first time. The transfer characteristics of MOSFET devices (1.8V W/L = 10µm/10µm) at sub-kelvin temperature are modeled using the simplified EKV model. This work facilitates the CMOS circuits design and the integration of CMOS circuits with silicon-based quantum chips at extremely low temperatures.

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BSIM3 parameters extraction of a 0.35 μm CMOS technology from 300K down to 77K

Cited by 5 publications

References 4 publications

Cryogenic Characerization and Modeling of Standard CMOS down to Liquid Helium Temperature for Quantum Computing

Cryogenic Characerization and Modeling of Standard CMOS down to Liquid Helium Temperature for Quantum Computing

Morphological, optical, and electrical characterizations and cryogenic reliability tests on AlInGaP red light emitting diodes immersed in liquid nitrogen

Characterization and Modeling of 0.18μm Bulk CMOS Technology at Sub-Kelvin Temperature

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