2022
DOI: 10.1088/2058-9565/ac734b
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Building blocks of a flip-chip integrated superconducting quantum processor

Abstract: We have integrated single and coupled superconducting transmon qubits into flip-chip modules. Each module consists of two chips - one quantum chip and one control chip - that are bump-bonded together. We demonstrate time-averaged coherence times exceeding 90μs, single-qubit gate fidelities exceeding 99.9%, and two-qubit gate fidelities above 98.6%. We also present device design methods and discuss the sensitivity of device parameters to variation in interchip spacing. Notably, the additional flip-chip fabricat… Show more

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Cited by 60 publications
(28 citation statements)
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“…Flip-chip bonded modules of two chips connected by superconducting bumps increase the layer count to two and air bridges further alleviate routing challenges. These have indeed been used successfully to construct processors of several dozen qubits [9]- [11], although with coherence times and gate fidelities significantly lower than in planar [12]- [16] or flip-chip bonded [17] single-or few-qubit devices.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…Flip-chip bonded modules of two chips connected by superconducting bumps increase the layer count to two and air bridges further alleviate routing challenges. These have indeed been used successfully to construct processors of several dozen qubits [9]- [11], although with coherence times and gate fidelities significantly lower than in planar [12]- [16] or flip-chip bonded [17] single-or few-qubit devices.…”
Section: Introductionmentioning
confidence: 99%
“…Yost et al [21], [22] have on the other hand demonstrated through-silicon vias (TSVs) that have a relatively high aspect ratio and high critical currents, and show promise in terms of not destroying qubit coherence, as the demonstrated qubit relaxation time of 12.5 µs [21] and resonator internal quality factors of 10 5 to 2 × 10 5 [22] were identified to be limited by factors unrelated to TSVs. For comparison, widelyreproduced relaxation times for transmon qubits on silicon substrates are near 50 µs [12]- [17]. In addition, Gordon et al have reported relaxation times of hundreds of µs [4].…”
Section: Introductionmentioning
confidence: 99%
“…Figure 4 shows a possible implementation of a gate electrode array, which is located on a separate wiring chip that is bumb-bonded to the chip carrying the qubits in a flip-chip configuration 36,37 . In Fig.…”
Section: ■◆❚❊•|❆❚■❖◆ ❲■❚❍ ◗❯❆◆❚❯▼ P|❖❈❊❙❙❖|❙mentioning
confidence: 99%
“…The device design and fabrication is described in Ref. [38] with the circuit schematic shown in Fig. 1.…”
Section: A Experimental Setupmentioning
confidence: 99%
“…The device design and fabrication is described in Ref. [38] with the circuit schematic shown in Fig. device consists of three fixed-frequency transmon qubits [39] with transition frequencies ω qi /2π at 5.36, 5.40, and 5.46 GHz for i = 1, 2, 3, respectively.…”
Section: A Experimental Setupmentioning
confidence: 99%