Carbon Nanotube and Resistive Random Access Memory Based Unbalanced Ternary Logic Gates and Basic Arithmetic Circuits

Abstract

In this paper, the design of ternary logic gates (standard ternary inverter, ternary NAND, ternary NOR) based on carbon nanotube field effect transistor (CNTFET) and resistive random access memory (RRAM) is proposed. Ternary logic has emerged as a very promising alternative to the existing binary logic systems owing to its energy efficiency, operating speed, information density and reduced circuit overheads such as interconnects and chip area. The proposed design employs active load RRAM and CNTFET instead of large resistors to implement ternary logic gates. The proposed ternary logic gates are then utilised to carry out basic arithmetic functions and is extendable to implement additional complex functions. The proposed ternary gates show significant advantages in terms of component count, chip area, power consumption, energy consumption and dense fabrication. The results demonstrate the advantage of the proposed models with a reduction of 50% in transistor count for the STI, TNAND and TNOR logic gates. For THA and THS arithmetic modules 65.11% reduction in transistor count is observed while for TM design, around 38% reduction is observed. In this work, we aim to demonstrate the viability of RRAM in the design of ternary logic systems, thus the focus is mainly on obtaining the proper functionality of the proposed design. Also the proposed logic gates show a very small variation in power consumption and energy consumption with variation in process parameters, temperature, output load, supply voltage and operating frequency. For simulations, HSPICE tool is used to verify the authenticity of the proposed designs. The ternary half adder, ternary half subtractor and ternary multiplier circuits are then implemented utilising the proposed gates and validated through simulations. INDEX TERMS Multiple valued logic (MVL), ternary logic systems, emerging technologies, carbon nanotube field effect transistor (CNTFET), resistive random access memory (RRAM).

Novel Ternary Adder and Multiplier Designs Without Using Decoders or Encoders

“…(3) Use ternary unary operators (see Section II) with TMUXs to reduce the transistors count used such as: Authors of [14], [22]- [26] designed THAs with (39,64,54,48, and 76 CNTFETs) and TMULs with (26,58,23,30, and 60 CNTFETs), respectively, using different designs of unary operators and TMUXs.…”

Carbon nanotube field effect transistor (CNTFET) operational transconductance amplifier (OTA) based design of high frequency memristor emulator

“…Therefore, power consumption in CNTFET designs can be reduced significantly in comparison to conventional silicon based MOSFET designs. The above‐mentioned properties make CNTFET one of the promising device structures to complement conventional silicon technology for high performance and low power designs 30‐38 . Figure 1 shows the schematics and symbols of CNTFET used in this work.…”

“…The above-mentioned properties make CNTFET one of the promising device structures to complement conventional silicon technology for high performance and low power designs. [30][31][32][33][34][35][36][37][38] Figure 1 shows the schematics and symbols of CNTFET used in this work.…”

“…In addition, CNTFET has better channel formation control than bulk MOSFET. Thus, the circuits designed using CNTFET have significantly higher performance as compared to conventional bulk MOSFET 37,38 …”

“…Thus, the circuits designed using CNTFET have significantly higher performance as compared to conventional bulk MOSFET. 37,38 Therefore, in this paper, CNTFET based OTA has been used to design a memristor emulator which can work over a wide frequency range. As compared to the reported emulators (except 29 ), the proposed emulator used least number of active and passive components and does not use any resistors or inductors.…”