Chaotic True Random Number Generator for Secure Communication Applications

Al-Shidaifat, AlaaDdin; Jayawickrama, Chamindra; Jung, Yuh‐Seog; Songwook-Lee,; Song, Hanjung; Kahrama, Nihan

doi:10.1109/isocc50952.2020.9333113

Cited by 4 publications

(1 citation statement)

References 12 publications

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“…On the contrary, the entropy source used for random data generation by a TRNG or a PUF is originated from physical phenomenon or physical disorder. The entropy sources of TRNG include quantum [3], [4], thermal noise [5], [6], chaos [7], and metastability [8]. The entropy harvested by a TRNG is dynamic, i.e., time variant.…”

Section: Introductionmentioning

confidence: 99%

A New Reconfigurable True Random Number Generator and Physical Unclonable Function Unified Chip With On-Chip Auto-Calibration

Cao,

Liu,

Zheng

et al. 2023

IEEE Trans. Circuits Syst. I

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Section: Introductionmentioning

confidence: 99%

A New Reconfigurable True Random Number Generator and Physical Unclonable Function Unified Chip With On-Chip Auto-Calibration

Cao,

Liu,

Zheng

et al. 2023

IEEE Trans. Circuits Syst. I

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Lightweight High‐Throughput TRNG Based on Single‐Node Boolean Chaotic Structure

Zhou,

Yao,

Feng

et al. 2024

Circuit Theory & Apps

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With the rise of the Internet and electronic devices, the security of network information is gaining attention, and the true random number generator (TRNG) is playing an increasingly crucial role in information security. TRNG, based on Boolean chaotic entropy source, has drawn significant interest due to its uncomplicated circuit design and minimal hardware resource usage. However, most existing structures consist of two‐input or three‐input logic devices, forming a complex multinode, geometrically symmetric Boolean chaotic network using multiple logic devices. This network configuration results in increased complexity and reduced throughput. This study introduces an entropy source based on Boolean chaos utilizing single‐node and four‐input XOR gates, which can be easily placed and routed on Xilinx Artix‐7 FPGA. It requires only 29 LUTs and 5 DFFs without any postprocessing, achieving a throughput of up to 700 Mb/s. The output of TRNG has successfully passed various tests including the autocorrelation test, NIST SP800‐22, NIST SP800‐90B, AIS‐31, and TESTU01 tests with favorable results. Furthermore, by applying a three‐stage XOR chain postprocessing on Xilinx Spartan‐6 FPGA and Xilinx Virtex‐6 FPGA, it has passed the NIST SP800‐22 and NIST SP800‐90B tests at 300 Mb/s. The structure was also tested using Xilinx Virtex‐6 FPGA under different temperature and voltage conditions, passing the NIST SP800‐90B IID test.

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