Characterization and Modeling of BTI in SiC MOSFETs

Abstract

SiC power MOSFETs have been investigated by performing two different kinds of measurements, the hysteresis between two adjecent sweeps and the positive bias temperature instability, at different temperatures. The threshold hysteresis is a measure of the switching dynamics of the interface traps, while measurements at long stress times can reveal the role of an additional interface degradation. In order to fully understand the role played by the latter mechanisms, TCAD simulations have been calibrated in order to reproduce the experimental results.

Threshold-voltage bias-instability in SiC MOSFETs: effects of stress temperature and level on oxide charge buildup and recovery

“…This can cause potential failure in big circuits [8,9,12]. Several models were developed over the years to identify the causes of the V th instability [13][14][15][16] in SiC MOSFETs. A major roadblock to accurately measuring this threshold voltage instability in SiC MOSFETs after the application of the stress is the extremely fast (in the order of 1 µs) recovery in these devices.…”