Characterization of Locked Combinational Circuits via ATPG

Duvalsaint, Danielle; Jin, Xiaoxiao; Niewenhuis, Benjamin; Blanton, R. D.

doi:10.1109/itc44170.2019.9000130

Cited by 18 publications

(4 citation statements)

References 32 publications

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“…These attacks are nevertheless currently only dedicated to key-gate-based logic locking methods. SKGLock+ should also be secure against the FALL and CLIC-A attacks [16,51] since it does not rely on a protected input pattern, which is the feature, common to TTLock and SFLL among others, that is exploited by these attacks.…”

Section: Discussion and Future Workmentioning

confidence: 99%

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SKG-Lock+: A Provably Secure Logic Locking SchemeCreating Significant Output Corruption

et al. 2022

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The current trend to globalize the supply chain in the Integrated Circuits (ICs) industry has raised several security concerns including, among others, IC overproduction. Over the past years, logic locking has grown into a prominent countermeasure to tackle this threat in particular. Logic locking consists of “locking” an IC with an added primary input, the so-called key, which, unless fed with the correct secret value, renders the ICs unusable. One of the first criteria ensuring the quality of a logic locking technique was the output corruption, i.e., the corruption at the outputs of a locked circuit, for any wrong key value. However, since the introduction of SAT-based attacks, resulting countermeasures have compromised this criterion in favor of a better resilience against such attacks. In this work, we propose SKG-Lock+, a Provably Secure Logic Locking scheme that can thwart SAT-based attacks while maintaining significant output corruption. We perform a comprehensive security analysis of SKG-Lock+ and show its resilience against SAT-based attacks, as well as various other state-of-the-art attacks. Compared with related works, SKG-Lock+ provides higher output corruption and incurs acceptable overhead.

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Section: Discussion and Future Workmentioning

confidence: 99%

“…[50] prunes out incorrect keys that introduce a significant level of logic redundancy. CLIC-A [51] is an ATPG-based attack, which exploits the use of a protected input patterns in CAC schemes.…”

Section: Post-psll/cac Attacksmentioning

confidence: 99%

SKG-Lock+: A Provably Secure Logic Locking SchemeCreating Significant Output Corruption

et al. 2022

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“…As one might expect, a defender that knows that this attack is possible can try to respond by adding multiple key inputs and gates such that it is not possible to sensitize an individual key input [24], i.e., the choice of where to insert locking logic needs to be carefully considered. Recent work has shown that the sensitization and other attacks that use automatic test pattern generation (ATPG) have shown success on various logic locking flavors [10,11]. This kind of adversarial back-and-forth or "cat-and-mouse" perspective has driven a lot of progress in logic locking [4,5,41].…”

Section: Early Analysesmentioning

confidence: 99%

High-Level Approaches to Hardware Security: A Tutorial

Pearce¹,

Karri²,

Tan³

2022

Preprint

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Designers use third-party intellectual property (IP) cores and outsource various steps in the integrated circuit (IC) design and manufacturing flow. As a result, security vulnerabilities have been rising. This is forcing IC designers and end users to re-evaluate their trust in ICs. If attackers get hold of an unprotected IC, they can reverse engineer the IC and pirate the IP. Similarly, if attackers get hold of a design, they can insert malicious circuits or take advantage of "backdoors" in a design. Unintended design bugs can also result in security weaknesses. This tutorial paper provides an introduction to the domain of hardware security through two pedagogical examples of hardware security problems. The first is a walk-through of the scan chain-based side channel attack. The second is a walk-through of logic locking of digital designs. The tutorial material is accompanied by open access digital resources that are linked in this article.CCS Concepts: • Hardware; • Security and privacy → Hardware attacks and countermeasures;

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“…Cyclic logic locking, on the other hand, is resilient to all three attacks and provides high corruptibility, but is broken by a modified SAT attack (CycSAT) and will thus not be implemented. SFLL-HD is resilient to sensitization attacks and resilience to SAT attacks, removal attacks, and corruptibility can be traded-off by choice of Hamming distance h. Even though there have been successful attempts to unlock circuits locked with the SFLL-HD algorithm [24][25][26], so far it has remained the most secure logic locking algorithm and is therefore chosen to be implemented.…”

Section: Analysis Of Algorithmsmentioning

confidence: 99%

Lockit: A Logic Locking Automation Software

2021

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The significant rise in the cost of manufacturing nanoscale integrated circuits (ICs) has led the majority of IC design companies to outsource the fabrication of their products to other companies, often located in different countries. The multinational nature of the hardware supply chain has led to a host of security threats, including IP piracy, IC overproduction, and Trojan insertion. To combat these, researchers have proposed logic locking techniques to protect the intellectual properties of the design and increase the difficulty of malicious modification of its functionality. However, the adoption of logic locking approaches has been rather slow due to the lack of integration with the IC production process and the lack of efficacy of existing algorithms. This work automates the logic locking process by developing software using Python that performs the locking on a gate-level netlist, which can be integrated with the existing digital synthesis tools. Analysis of the latest logic locking algorithms has demonstrated that the SFLL-HD algorithm is one of the most secure and versatile when trading-off levels of protection against different types of attacks and was thus selected for implementation. The presented tool can also be expanded to incorporate the latest locking mechanisms to keep up with the fast-paced development in this field. The paper also presents a case study to demonstrate the functionality of the tool and how it could be used to explore the design space and compare different locking solutions.

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Characterization of Locked Combinational Circuits via ATPG

Cited by 18 publications

References 32 publications

SKG-Lock+: A Provably Secure Logic Locking SchemeCreating Significant Output Corruption

SKG-Lock+: A Provably Secure Logic Locking SchemeCreating Significant Output Corruption

High-Level Approaches to Hardware Security: A Tutorial

Lockit: A Logic Locking Automation Software

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