Charge Sharing Study in the Case of Neutron Induced SEU on 130 nm Bulk SRAM Modeled by 3-D Device Simulation

Merelle,; Serre,; Saigne,; Sagnes,; Gasiot,; Carrière, Véronique; Palau,

doi:10.1109/tns.2006.878819

Cited by 12 publications

(3 citation statements)

References 17 publications

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“…[10] In addition, the sensitive volumes (SVs) with respect to ion track structure have been examined as a complementary aspect to analyze the MBU sensitivity. For instance, Palau et al [11] discussed static random access memories (SRAMs) in response to internal ion tracks generated by nuclear reactions, and Merelle et al [12] analyzed charge collection using ion tracks on a 130-nm bulk SRAM, in which the detailed characteristics of the ion track structure, particularly radial distribution of electron-hole density, have been obtained to predict MBU probabilty and multiplicity. Therefore, a realistic ion track structure appears to be more applicable, particularly in SEE characterization.…”

Section: Introductionmentioning

confidence: 99%

Monte Carlo evaluation of spatial multiple-bit upset sensitivity to oblique incidence

Geng¹,

Liu²,

Xi³

et al. 2013

Chinese Phys. B

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We investigate the impact of heavy ion irradiation on a hypothetical static random access memory (SRAM) device. Influences of the irradiation angle, critical charge, drain-drain spacing, and dimension of device structure on the device sensitivity have been studied. These prediction and simulated results are interpreted with MUFPSA, a Monte Carlo code based on Geant4. The results show that the orientation of ion beams and device with different critical charge exert indispensable effects on multiple-bit upsets (MBUs), and that with the decrease in spacing distance between adjacent cells or the dimension of the cells, the device is more susceptible to single event effect, especially to MBUs at oblique incidence.

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Section: Introductionmentioning

confidence: 99%

Monte Carlo evaluation of spatial multiple-bit upset sensitivity to oblique incidence

Geng¹,

Liu²,

Xi³

et al. 2013

Chinese Phys. B

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“…Circuit-level simulations, which do not account for these factors, fail to properly assess the ability of the circuit to withstand SEU. Due to the shared active region in the SRAM layout, neighboring devices are also influenced when a single particle enters an individual device [16,17]. The sharing of active regions in an SRAM circuit leads to an increased area of sensitive regions (the drain regions of M1 and M3), indirectly raising the probability of being impacted by a single particle.…”

Section: Sram Device Level See Simulationmentioning

confidence: 99%

Single Event Upset Study of 22 nm Fully Depleted Silicon-on-Insulator Static Random Access Memory with Charge Sharing Effect

Yin,

Gao,

Wei

et al. 2023

Micromachines

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In this paper, the single event effect of 6T-SRAM is simulated at circuit level and device level based on a 22 nm fully depleted silicon-on-insulator (FDSOI) process, and the effects of charge sharing and bipolar amplification are considered in device-level simulation. The results demonstrate that, under the combined influence of these two effects, the circuit’s upset threshold and critical charge decreased by 15.4% and 23.5%, respectively. This indicates that the charge sharing effect exacerbates the single event effects. By analyzing the incident conditions of two different incident radius particles, it is concluded that the particles with a smaller incident radius have a worse impact on the SRAM circuit, and are more likely to cause the single event upset in the circuit, indicating that the ionization distribution generated by the incident particle affects the charge collection.

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“…S a consequence of device integration, the charge necessary to induce a bit-flip (SEU: Single-Event Upset) has decreased considerably and effects that were negligible now have to be taken into account for SER (Soft Event Rate) prediction [1][2][3]. From a circuit level point of view, the ion effect can be considered as a noise source for Static Random Access Memories (SRAMs) as power and ground noise, capacitive coupling noise… Among the encountered problems induced by SRAMs shrinking, those created by radioactive impurities and cosmic radiations are significant [1,4].…”

Section: Introductionmentioning

confidence: 99%

Contribution to SER prediction: A new metric based on RC transient simulations

Micolau¹,

Castellani-Coulie²,

Aziza³

2011

2011 12th European Conference on Radiation and Its Effects on Components and Systems

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Charge Sharing Study in the Case of Neutron Induced SEU on 130 nm Bulk SRAM Modeled by 3-D Device Simulation

Cited by 12 publications

References 17 publications

Monte Carlo evaluation of spatial multiple-bit upset sensitivity to oblique incidence

Monte Carlo evaluation of spatial multiple-bit upset sensitivity to oblique incidence

Single Event Upset Study of 22 nm Fully Depleted Silicon-on-Insulator Static Random Access Memory with Charge Sharing Effect

Contribution to SER prediction: A new metric based on RC transient simulations

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