Charge trapping in dry and wet oxides on N-type 6H–SiC studied by Fowler–Nordheim charge injection

Abstract

Metal-oxide-semiconductor capacitors fabricated by dry and wet oxidation at 1150 °C of n-type 6H–SiC exhibit a drastic negative charging during Fowler–Nordheim charge injection. This charging strongly depends on the fabrication conditions of the samples. The densities of interface states and oxide charges can be significantly reduced by a postoxidation anneal in Ar for as long as 60 min. A large part of the charge appears to be trapped at the interface. These charges are released from the traps by illumination at photon energies between 2 and 4 eV or by annealing below 300 °C. During charge injection interface states are created near the conduction band edge. Their density is strongly reduced by annealing at 150 °C. For the oxide charging we find capture cross sections in the range of 10−15–10−17 cm−2. In unannealed wet oxidized samples the traps exhibit properties similar to those of water-related traps in SiO2 on Si.

Total Dose Radiation Response of Nitrided and Non-nitrided SiO$_{2}$/4H-SiC MOS Capacitors

“…The precursors to these electron traps may not be charged during pre-irradiation characterization when the Fermi level sweeps through the band gap, but become charged due to ionizing radiation. Earlier studies have reported interface trap buildup at non-nitrided SiO /SiC interfaces resulting from electron injection via photo and Fowler-Nordheim methods [21]- [24]. A significant density of acceptor states was observed at the SiO /SiC interface after electron injection as compared to SiO /Si [21], [23].…”

Physics and Technology of Silicon Carbide Devices

“…Both Ar anneal performed at growth temperature and re-oxidation at lower temperatures (e.g. 900 • C) have indeed proven to slightly reduce the amount of deep states [40,129]. This can be explained by the removal of excess carbon without additional oxide formation, as corresponding atomic configurations yield defects populating interface states toward the middle of the gap.…”

Tailoring Oxide/Silicon Carbide Interfaces: NO Annealing and Beyond

“…Both Ar anneal performed at growth temperature and re-oxidation at lower temperatures (e.g. 900 • C) have indeed proven to slightly reduce the amount of deep states [40,129]. This can be explained by the removal of excess carbon without additional oxide formation, as corresponding atomic configurations yield defects populating interface states toward the middle of the gap.…”