Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory

Chang, Meng-Fan; Lin, Ku-Feng; Chuang, Ching-Hao; Huang, Li-Yue; Chien, Tun-Fei; Sheu, Shyh-Shyuan; Su, Keng-Li; Lee, Heng-Yuan; Chen, Frederick T.; Lien, Chenhsin; Chen, Ping-Cheng; Chiou, Lih-Yih; Ku, Tzu–Kun; Tsai, Ming-Jinn; Kao, Ming-Jer

doi:10.1109/icsict.2012.6467794

Cited by 6 publications

(3 citation statements)

References 5 publications

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“…The VSA is used for precharging selected BLs to a target voltage, allowing the reading of both LRS and HRS cells. However, the limited voltage difference between HRS and LRS cells makes it susceptible to BL noise and coupling [97]. The CSA imposes a fixed bias voltage on the BL to induce current in the cell for reading.…”

Section: Read/write Circuit Design: Power Efficiency Focusmentioning

confidence: 99%

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A Survey of Emerging Memory in a Microcontroller Unit

Qi,

Fan,

Cai

et al. 2024

Micromachines

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In the era of widespread edge computing, energy conservation modes like complete power shutdown are crucial for battery-powered devices, but they risk data loss in volatile memory. Energy autonomous systems, relying on ambient energy, face operational challenges due to power losses. Recent advancements in emerging nonvolatile memories (NVMs) like FRAM, RRAM, MRAM, and PCM offer mature solutions to sustain work progress with minimal energy overhead during outages. This paper thoroughly reviews utilizing emerging NVMs in microcontroller units (MCUs), comparing their key attributes to describe unique benefits and potential applications. Furthermore, we discuss the intricate details of NVM circuit design and NVM-driven compute-in-memory (CIM) architectures. In summary, integrating emerging NVMs into MCUs showcases promising prospects for next-generation applications such as Internet of Things and neural networks.

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Section: Read/write Circuit Design: Power Efficiency Focusmentioning

confidence: 99%

“…Compared with VSA, the CSA minimizes the vulnerability to BL noise and coupling. Moreover, it exhibits faster read speeds than VSA when the BL length of a 0.18 µm RRAM macro exceeds 128 rows [97].…”

Section: Read/write Circuit Design: Power Efficiency Focusmentioning

confidence: 99%

A Survey of Emerging Memory in a Microcontroller Unit

Qi,

Fan,

Cai

et al. 2024

Micromachines

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“…A ReRAM memory cell is a metal-insulator-metal (MIM) structure composed of a resistive switch medium, such as metal oxides, which could be easily integrated with existing CMOS technology [4,9]. Moreover, the high density mass storage could be supported by multi-level cell (MLC) operations in ReRAMs [10][11][12]. The resistive switching phenomenon has been observed in a wide variety of insulator oxides, such as Ta 2 O 5 , TiO 2 , HfO 2 , ZrO 2 and Al 2 O 3 [13][14][15][16][17][18][19][20].…”

Section: Introductionmentioning

confidence: 99%

Critical role of a double-layer configuration in solution-based unipolar resistive switching memories

et al. 2018

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Lately, resistive switching memories (ReRAM) have been attracting a lot of attention due to their possibilities of fast operation, lower power consumption and simple fabrication process and they can also be scaled to very small dimensions. However, most of these ReRAM are produced by physical methods and nowadays the industry demands more simplicity, typically associated with low cost manufacturing. As such, ReRAMs in this work are developed from a solution-based aluminum oxide (AlO) using a simple combustion synthesis process. The device performance is optimized by two-stage deposition of the AlO film. The resistive switching properties of the bilayer devices are reproducible with a yield of 100%. The ReRAM devices show unipolar resistive switching behavior with good endurance and retention time up to 10 s at 85 °C. The devices can be programmed in a multi-level cell operation mode by application of different reset voltages. Temperature analysis of various resistance states reveals a filamentary nature based on the oxygen vacancies. The optimized film was stacked between ITO and indium zinc oxide, targeting a fully transparent device for applications on transparent system-on-panel technology.

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